Searched refs:mmUTCL2_MEM_ECC_CNTL (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/amd/include/asic_reg/gc/ |
| A D | gc_9_4_1_offset.h | 256 #define mmUTCL2_MEM_ECC_CNTL … macro
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | gfx_v9_4.c | 699 WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_CNTL, 0); in gfx_v9_4_query_utc_edc_status()
752 data = RREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_CNTL); in gfx_v9_4_query_utc_edc_status()
933 WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_CNTL, 0); in gfx_v9_4_reset_ras_error_count()
952 RREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_CNTL); in gfx_v9_4_reset_ras_error_count()
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