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Searched refs:mode1 (Results 1 – 22 of 22) sorted by relevance

/drivers/comedi/drivers/
A Daddi_apci_1032.c85 unsigned int mode1; /* rising-edge/high level channels */ member
128 devpriv->mode1 = 0; in apci1032_cos_insn_config()
139 devpriv->mode1 = 0; in apci1032_cos_insn_config()
143 devpriv->mode1 &= oldmask; in apci1032_cos_insn_config()
147 devpriv->mode1 |= himask; in apci1032_cos_insn_config()
157 devpriv->mode1 = 0; in apci1032_cos_insn_config()
161 devpriv->mode1 &= oldmask; in apci1032_cos_insn_config()
165 devpriv->mode1 |= himask; in apci1032_cos_insn_config()
244 outl(devpriv->mode1, dev->iobase + APCI1032_MODE1_REG); in apci1032_cos_cmd()
A Daddi_apci_1564.c165 unsigned int mode1; /* rising-edge/high level channels */ member
353 devpriv->mode1 = 0; in apci1564_cos_insn_config()
365 devpriv->mode1 = 0; in apci1564_cos_insn_config()
369 devpriv->mode1 &= oldmask; in apci1564_cos_insn_config()
373 devpriv->mode1 |= himask; in apci1564_cos_insn_config()
383 devpriv->mode1 = 0; in apci1564_cos_insn_config()
387 devpriv->mode1 &= oldmask; in apci1564_cos_insn_config()
391 devpriv->mode1 |= himask; in apci1564_cos_insn_config()
399 devpriv->mode1 &= APCI1564_DI_INT_MODE_MASK; in apci1564_cos_insn_config()
467 if (!devpriv->ctrl && !(devpriv->mode1 || devpriv->mode2)) { in apci1564_cos_cmd()
[all …]
A Dni_mio_common.c2182 int mode1 = 0; /* mode1 is needed for both stop and convert */ in ni_ai_cmd() local
2257 mode1 |= NISTC_AI_MODE1_START_STOP | in ni_ai_cmd()
2260 ni_stc_writew(dev, mode1, NISTC_AI_MODE1_REG); in ni_ai_cmd()
2280 mode1 |= NISTC_AI_MODE1_START_STOP | in ni_ai_cmd()
2283 ni_stc_writew(dev, mode1, NISTC_AI_MODE1_REG); in ni_ai_cmd()
2362 mode1 |= NISTC_AI_MODE1_CONVERT_SRC( in ni_ai_cmd()
2368 mode1 |= NISTC_AI_MODE1_CONVERT_POLARITY; in ni_ai_cmd()
2369 ni_stc_writew(dev, mode1, NISTC_AI_MODE1_REG); in ni_ai_cmd()
/drivers/pwm/
A Dpwm-sunplus.c59 u32 dd_freq, duty, mode0, mode1; in sunplus_pwm_apply() local
71 mode1 = readl(priv->base + SP7021_PWM_MODE1); in sunplus_pwm_apply()
72 mode1 &= ~SP7021_PWM_MODE1_CNT_EN(pwm->hwpwm); in sunplus_pwm_apply()
73 writel(mode1, priv->base + SP7021_PWM_MODE1); in sunplus_pwm_apply()
105 mode1 = readl(priv->base + SP7021_PWM_MODE1); in sunplus_pwm_apply()
106 mode1 |= SP7021_PWM_MODE1_CNT_EN(pwm->hwpwm); in sunplus_pwm_apply()
121 writel(mode1, priv->base + SP7021_PWM_MODE1); in sunplus_pwm_apply()
/drivers/cpufreq/
A Damd-pstate-ut.c246 enum amd_pstate_mode mode1, mode2 = AMD_PSTATE_DISABLE; in amd_pstate_ut_check_driver() local
250 for (mode1 = AMD_PSTATE_DISABLE; mode1 < AMD_PSTATE_MAX; mode1++) { in amd_pstate_ut_check_driver()
251 ret = amd_pstate_set_mode(mode1); in amd_pstate_ut_check_driver()
255 if (mode1 == mode2) in amd_pstate_ut_check_driver()
266 amd_pstate_get_mode_string(mode1), in amd_pstate_ut_check_driver()
/drivers/gpu/drm/
A Ddrm_modes.c1478 mode1->htotal == mode2->htotal && in drm_mode_match_timings()
1479 mode1->hskew == mode2->hskew && in drm_mode_match_timings()
1483 mode1->vtotal == mode2->vtotal && in drm_mode_match_timings()
1484 mode1->vscan == mode2->vscan; in drm_mode_match_timings()
1494 if (mode1->clock && mode2->clock) in drm_mode_match_clock()
1497 return mode1->clock == mode2->clock; in drm_mode_match_clock()
1535 if (!mode1 && !mode2) in drm_mode_match()
1538 if (!mode1 || !mode2) in drm_mode_match()
1578 return drm_mode_match(mode1, mode2, in drm_mode_equal()
1601 return drm_mode_match(mode1, mode2, in drm_mode_equal_no_clocks()
[all …]
/drivers/gpu/drm/radeon/
A Drs690.c206 struct drm_display_mode *mode1, in rs690_line_buffer_adjust() argument
231 if (mode1 && mode2) { in rs690_line_buffer_adjust()
233 if (mode1->hdisplay > 2560) in rs690_line_buffer_adjust()
244 } else if (mode1) { in rs690_line_buffer_adjust()
252 if (mode1) in rs690_line_buffer_adjust()
464 struct drm_display_mode *mode1, in rs690_compute_mode_priority() argument
474 if (mode0 && mode1) { in rs690_compute_mode_priority()
554 } else if (mode1) { in rs690_compute_mode_priority()
615 if (mode1) in rs690_bandwidth_update()
638 mode0, mode1, in rs690_bandwidth_update()
[all …]
A Drv515.c1083 struct drm_display_mode *mode1, in rv515_compute_mode_priority() argument
1093 if (mode0 && mode1) { in rv515_compute_mode_priority()
1173 } else if (mode1) { in rv515_compute_mode_priority()
1206 struct drm_display_mode *mode1 = NULL; in rv515_bandwidth_avivo_update() local
1216 mode1 = &rdev->mode_info.crtcs[1]->base.mode; in rv515_bandwidth_avivo_update()
1217 rs690_line_buffer_adjust(rdev, mode0, mode1); in rv515_bandwidth_avivo_update()
1231 mode0, mode1, in rv515_bandwidth_avivo_update()
1235 mode0, mode1, in rv515_bandwidth_avivo_update()
1248 struct drm_display_mode *mode1 = NULL; in rv515_bandwidth_update() local
1258 mode1 = &rdev->mode_info.crtcs[1]->base.mode; in rv515_bandwidth_update()
[all …]
A Dr100.c3232 struct drm_display_mode *mode1 = NULL; in r100_bandwidth_update() local
3249 mode1 = &rdev->mode_info.crtcs[0]->base.mode; in r100_bandwidth_update()
3271 if (mode1) in r100_bandwidth_update()
3289 if (mode1) { in r100_bandwidth_update()
3291 pix_clk.full = dfixed_const(mode1->clock); /* convert to fixed point */ in r100_bandwidth_update()
3483 if (mode1) { in r100_bandwidth_update()
3488 stop_req = mode1->hdisplay * pixel_bytes1 / 16; in r100_bandwidth_update()
3605 if (mode1) { in r100_bandwidth_update()
3662 if (mode1) in r100_bandwidth_update()
3663 rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); in r100_bandwidth_update()
A Drs600.c902 struct drm_display_mode *mode1 = NULL; in rs600_bandwidth_update() local
914 mode1 = &rdev->mode_info.crtcs[1]->base.mode; in rs600_bandwidth_update()
916 rs690_line_buffer_adjust(rdev, mode0, mode1); in rs600_bandwidth_update()
A Devergreen.c2327 struct drm_display_mode *mode1 = NULL; in evergreen_bandwidth_update() local
2342 mode1 = &rdev->mode_info.crtcs[i+1]->base.mode; in evergreen_bandwidth_update()
2343 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); in evergreen_bandwidth_update()
2345 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); in evergreen_bandwidth_update()
A Dsi.c2443 struct drm_display_mode *mode1 = NULL; in dce6_bandwidth_update() local
2458 mode1 = &rdev->mode_info.crtcs[i+1]->base.mode; in dce6_bandwidth_update()
2459 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); in dce6_bandwidth_update()
2461 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); in dce6_bandwidth_update()
A Dradeon_asic.h270 struct drm_display_mode *mode1,
/drivers/tty/serial/
A Dsb1250-duart.c472 unsigned int mode1; in sbd_startup() local
488 mode1 = read_sbdchn(sport, R_DUART_MODE_REG_1); in sbd_startup()
490 write_sbdchn(sport, R_DUART_MODE_REG_1, mode1); in sbd_startup()
538 unsigned int mode1 = 0, mode2 = 0, aux = 0; in sbd_set_termios() local
557 mode1 |= V_DUART_BITS_PER_CHAR_7; in sbd_set_termios()
561 mode1 |= V_DUART_BITS_PER_CHAR_8; in sbd_set_termios()
571 mode1 |= V_DUART_PARITY_MODE_ADD; in sbd_set_termios()
573 mode1 |= V_DUART_PARITY_MODE_NONE; in sbd_set_termios()
575 mode1 |= M_DUART_PARITY_TYPE_ODD; in sbd_set_termios()
577 mode1 |= M_DUART_PARITY_TYPE_EVEN; in sbd_set_termios()
[all …]
A Dmax310x.c273 u8 mode1; member
402 .mode1 = MAX310X_MODE1_AUTOSLEEP_BIT | MAX310X_MODE1_IRQSEL_BIT,
416 .mode1 = MAX310X_MODE1_AUTOSLEEP_BIT,
430 .mode1 = MAX310X_MODE1_AUTOSLEEP_BIT,
444 .mode1 = MAX310X_MODE1_IRQSEL_BIT,
1007 unsigned int delay, mode1 = 0, mode2 = 0; in max310x_rs_proc() local
1014 mode1 = MAX310X_MODE1_TRNSCVCTRL_BIT; in max310x_rs_proc()
1021 MAX310X_MODE1_TRNSCVCTRL_BIT, mode1); in max310x_rs_proc()
1346 regmap_write(regmaps[i], MAX310X_MODE1_REG, devtype->mode1); in max310x_probe()
/drivers/video/fbdev/core/
A Dmodedb.c934 return (mode1->xres == mode2->xres && in fb_mode_is_equal()
935 mode1->yres == mode2->yres && in fb_mode_is_equal()
936 mode1->pixclock == mode2->pixclock && in fb_mode_is_equal()
937 mode1->hsync_len == mode2->hsync_len && in fb_mode_is_equal()
938 mode1->vsync_len == mode2->vsync_len && in fb_mode_is_equal()
939 mode1->left_margin == mode2->left_margin && in fb_mode_is_equal()
940 mode1->right_margin == mode2->right_margin && in fb_mode_is_equal()
941 mode1->upper_margin == mode2->upper_margin && in fb_mode_is_equal()
942 mode1->lower_margin == mode2->lower_margin && in fb_mode_is_equal()
943 mode1->sync == mode2->sync && in fb_mode_is_equal()
[all …]
A Dfbmem.c241 struct fb_videomode mode1, mode2; in fb_set_var() local
243 fb_var_to_videomode(&mode1, var); in fb_set_var()
246 ret = fb_mode_is_equal(&mode1, &mode2); in fb_set_var()
248 ret = fbcon_mode_deleted(info, &mode1); in fb_set_var()
250 fb_delete_videomode(&mode1, &info->modelist); in fb_set_var()
/drivers/rtc/
A Drtc-pcf85063.c274 s8 mode0, mode1, reg; in pcf85063_set_offset() local
283 mode1 = DIV_ROUND_CLOSEST(offset, PCF85063_OFFSET_STEP1); in pcf85063_set_offset()
286 error1 = abs(offset - (mode1 * PCF85063_OFFSET_STEP1)); in pcf85063_set_offset()
287 if (mode1 > 63 || mode1 < -64 || error0 < error1) in pcf85063_set_offset()
290 reg = mode1 | PCF85063_OFFSET_MODE; in pcf85063_set_offset()
/drivers/gpu/drm/i915/display/
A Dintel_panel.c181 const struct drm_display_mode *mode1; in has_drrs_modes() local
183 list_for_each_entry(mode1, &connector->panel.fixed_modes, head) { in has_drrs_modes()
184 const struct drm_display_mode *mode2 = mode1; in has_drrs_modes()
187 if (is_alt_drrs_mode(mode1, mode2)) in has_drrs_modes()
A Dintel_ddi.c4470 static bool mode_equal(const struct drm_display_mode *mode1, in mode_equal() argument
4473 return drm_mode_match(mode1, mode2, in mode_equal()
4477 mode1->clock == mode2->clock; /* we want an exact match */ in mode_equal()
/drivers/block/
A Dswim.c313 swim_write(base, mode1, INTERNAL_DRIVE); /* set drive 0 bit */ in swim_drive()
316 swim_write(base, mode1, EXTERNAL_DRIVE); /* set drive 1 bit */ in swim_drive()
469 swim_write(base, mode1, MOTON); in swim_read_sector()
/drivers/gpu/drm/amd/amdgpu/
A Ddce_v6_0.c1129 struct drm_display_mode *mode1 = NULL; in dce_v6_0_bandwidth_update() local
1144 mode1 = &adev->mode_info.crtcs[i+1]->base.mode; in dce_v6_0_bandwidth_update()
1145 lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode0, mode1); in dce_v6_0_bandwidth_update()
1147 lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i+1], mode1, mode0); in dce_v6_0_bandwidth_update()

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