| /drivers/gpu/drm/amd/display/dc/mpc/dcn32/ |
| A D | dcn32_mpc.c | 48 int mpcc_id; in mpc32_mpc_init() local
54 for (mpcc_id = 0; mpcc_id < mpc30->num_mpcc; mpcc_id++) { in mpc32_mpc_init()
61 for (mpcc_id = 0; mpcc_id < mpc30->num_mpcc; mpcc_id++) in mpc32_mpc_init()
69 uint32_t mpcc_id, in mpc32_power_on_blnd_lut() argument
126 uint32_t mpcc_id, in mpc32_configure_post1dlut() argument
169 uint32_t mpcc_id, in mpc32_program_post1dluta_settings() argument
198 uint32_t mpcc_id, in mpc32_program_post1dlutb_settings() argument
226 uint32_t mpcc_id, in mpc32_program_post1dlut_pwl() argument
264 uint32_t mpcc_id) in mpc32_program_post1dlut() argument
758 int mpcc_id) in get3dlut_config() argument
[all …]
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| A D | dcn32_mpc.h | 315 int mpcc_id);
319 uint32_t mpcc_id);
323 uint32_t mpcc_id);
335 uint32_t mpcc_id,
339 uint32_t mpcc_id,
344 uint32_t mpcc_id,
348 uint32_t mpcc_id,
352 uint32_t mpcc_id,
358 uint32_t mpcc_id);
373 uint32_t mpcc_id,
[all …]
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| /drivers/gpu/drm/amd/display/dc/mpc/dcn401/ |
| A D | dcn401_mpc.c | 70 int mpcc_id) in get3dlut_config() argument
76 REG_GET(MPCC_MCM_3DLUT_MODE[mpcc_id], in get3dlut_config()
131 mpc32_power_on_blnd_lut(mpc, mpcc_id, true); in mpc401_populate_lut()
192 is_12bits_color_channel, mpcc_id); in mpc401_populate_lut()
230 int mpcc_id) in mpc401_program_lut_mode() argument
266 REG_UPDATE(MPCC_MCM_1DLUT_CONTROL[mpcc_id], in mpc401_program_lut_mode()
299 unsigned int mpcc_id, in mpc_program_gamut_remap() argument
420 int mpcc_id, in mpc401_set_gamut_remap() argument
442 REG_GET(MPCC_GAMUT_REMAP_MODE[mpcc_id], in mpc401_set_gamut_remap()
469 int mpcc_id, in mpc_read_gamut_remap() argument
[all …]
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| A D | dcn401_mpc.h | 207 …c401_set_movable_cm_location(struct mpc *mpc, enum mpcc_movable_cm_location location, int mpcc_id);
209 bool lut_bank_a, int mpcc_id);
216 int mpcc_id);
222 int mpcc_id);
227 int mpcc_id);
231 int mpcc_id,
236 int mpcc_id,
241 int mpcc_id,
246 unsigned int mpcc_id,
252 int mpcc_id,
[all …]
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| /drivers/gpu/drm/amd/display/dc/mpc/dcn10/ |
| A D | dcn10_mpc.c | 42 int mpcc_id) in mpc1_set_bg_color() argument
79 int mpcc_id) in mpc1_update_blending() argument
97 int mpcc_id) in mpc1_update_stereo_mix() argument
186 int mpcc_id) in mpc1_insert_plane() argument
278 int mpcc_id = mpcc_to_remove->mpcc_id; in mpc1_remove_mpcc() local
358 int mpcc_id; in mpc1_mpc_init() local
362 for (mpcc_id = 0; mpcc_id < mpc10->num_mpcc; mpcc_id++) { in mpc1_mpc_init()
368 mpc1_init_mpcc(&(mpc->mpcc_array[mpcc_id]), mpcc_id); in mpc1_mpc_init()
389 mpc1_init_mpcc(&(mpc->mpcc_array[mpcc_id]), mpcc_id); in mpc1_mpc_init_single_inst()
406 int mpcc_id; in mpc1_init_mpcc_list_from_hw() local
[all …]
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| A D | dcn10_mpc.h | 148 int mpcc_id);
160 unsigned int mpcc_id);
174 int mpcc_id);
178 int mpcc_id);
186 int mpcc_id);
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| /drivers/gpu/drm/amd/display/dc/mpc/dcn20/ |
| A D | dcn20_mpc.c | 51 int mpcc_id) in mpc2_update_blending() argument
57 REG_UPDATE_7(MPCC_CONTROL[mpcc_id], in mpc2_update_blending()
273 struct mpc *mpc, int mpcc_id, in mpc20_power_on_ogam_lut() argument
278 REG_SET(MPCC_MEM_PWR_CTRL[mpcc_id], 0, in mpc20_power_on_ogam_lut()
284 struct mpc *mpc, int mpcc_id, in mpc20_configure_ogam_lut() argument
377 struct mpc *mpc, int mpcc_id, in mpc20_program_ogam_pwl() argument
392 REG_SET(MPCC_OGAM_LUT_DATA[mpcc_id], 0, in mpc20_program_ogam_pwl()
432 int mpcc_id, in mpc2_set_output_gamma() argument
491 REG_GET(MPCC_TOP_SEL[mpcc_id], in mpc2_assert_mpcc_idle_before_connect()
494 REG_GET_3(MPCC_STATUS[mpcc_id], in mpc2_assert_mpcc_idle_before_connect()
[all …]
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| A D | dcn20_mpc.h | 280 int mpcc_id);
306 int mpcc_id,
310 void mpc2_assert_mpcc_idle_before_connect(struct mpc *mpc, int mpcc_id);
311 void mpc20_power_on_ogam_lut(struct mpc *mpc, int mpcc_id, bool power_on);
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| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | mpc.h | 267 int mpcc_id; member
396 int mpcc_id);
444 unsigned int mpcc_id);
464 int mpcc_id);
517 int mpcc_id);
721 int mpcc_id,
741 int mpcc_id,
761 int mpcc_id);
838 int mpcc_id,
959 int mpcc_id);
[all …]
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| /drivers/gpu/drm/amd/display/dc/mpc/dcn30/ |
| A D | dcn30_mpc.c | 71 if (mpcc_id < MAX_OPP && REG(MUX[mpcc_id])) in mpc3_mpc_init_single_inst()
95 int mpcc_id) in mpc3_set_dwb_mux() argument
100 MPC_DWB0_MUX, mpcc_id); in mpc3_set_dwb_mux()
343 int mpcc_id, in mpc3_set_output_gamma() argument
1051 mpcc->mpcc_id = mpcc_inst; in mpc3_init_mpcc()
1068 int mpcc_id, in program_gamut_remap() argument
1127 int mpcc_id, in mpc3_set_gamut_remap() argument
1161 int mpcc_id, in read_gamut_remap() argument
1199 int mpcc_id, in mpc3_get_gamut_remap() argument
1456 int mpcc_id; in mpc3_set_mpc_mem_lp_mode() local
[all …]
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| A D | dcn30_mpc.h | 1015 unsigned int mpcc_id);
1028 int mpcc_id, int rmu_idx);
1054 int mpcc_id,
1063 int mpcc_id,
1067 int mpcc_id,
1078 int mpcc_id);
1096 struct mpc *mpc, int mpcc_id,
1103 int mpcc_id);
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| A D | dcn201_hwseq.c | 316 hubp->mpcc_id = dpp->inst; in dcn201_init_hw()
427 int mpcc_id, dpp_id; in dcn201_update_mpcc() local
482 mpcc_id = dpp_id; in dcn201_update_mpcc()
486 dc->hwss.update_visual_confirm_color(dc, pipe_ctx, mpcc_id); in dcn201_update_mpcc()
487 mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id); in dcn201_update_mpcc()
508 dc->res_pool->mpc, mpcc_id); in dcn201_update_mpcc()
511 dc->hwss.update_visual_confirm_color(dc, pipe_ctx, mpcc_id); in dcn201_update_mpcc()
518 mpcc_id); in dcn201_update_mpcc()
522 hubp->mpcc_id = mpcc_id; in dcn201_update_mpcc()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| A D | dcn401_hwseq.c | 87 unsigned int mpcc_id = pipe_ctx->plane_res.mpcc_inst; in dcn401_program_gamut_remap() local
107 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap()
113 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap()
129 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap()
371 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn401_get_mcm_lut_xable_from_pipe_ctx() local
403 int mpcc_id = hubp->inst; in dcn401_populate_mcm_luts() local
473 mpcc_id); in dcn401_populate_mcm_luts()
547 mpcc_id); in dcn401_populate_mcm_luts()
606 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn401_set_mcm_luts() local
657 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn401_set_output_transfer_func() local
[all …]
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| A D | dcn30_hwseq.c | 257 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn30_set_mpc_shaper_3dlut() local
285 if (mpcc_id_projected != mpcc_id) in dcn30_set_mpc_shaper_3dlut()
290 acquired_rmu = mpc->funcs->acquire_rmu(mpc, mpcc_id, in dcn30_set_mpc_shaper_3dlut()
307 mpc->funcs->release_rmu(mpc, mpcc_id); in dcn30_set_mpc_shaper_3dlut()
358 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn30_program_gamut_remap() local
387 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn30_program_gamut_remap()
394 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn30_set_output_transfer_func() local
419 mpc->funcs->set_output_gamma(mpc, mpcc_id, params); in dcn30_set_output_transfer_func()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| A D | dcn32_hwseq.c | 443 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn32_set_mpc_shaper_3dlut() local
464 result = mpc->funcs->program_3dlut(mpc, &stream->lut3d_func->lut_3d, mpcc_id); in dcn32_set_mpc_shaper_3dlut()
468 result = mpc->funcs->program_shaper(mpc, shaper_lut, mpcc_id); in dcn32_set_mpc_shaper_3dlut()
480 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn32_set_mcm_luts() local
496 mpc->funcs->program_1dlut(mpc, lut_params, mpcc_id); in dcn32_set_mcm_luts()
510 mpc->funcs->program_shaper(mpc, lut_params, mpcc_id); in dcn32_set_mcm_luts()
514 result = mpc->funcs->program_3dlut(mpc, &plane_state->lut3d_func.lut_3d, mpcc_id); in dcn32_set_mcm_luts()
516 result = mpc->funcs->program_3dlut(mpc, NULL, mpcc_id); in dcn32_set_mcm_luts()
564 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn32_set_output_transfer_func() local
589 mpc->funcs->set_output_gamma(mpc, mpcc_id, params); in dcn32_set_output_transfer_func()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_hw_sequencer.c | 850 …block_sequence[*num_steps].params.update_visual_confirm_params.mpcc_id = current_mpc_pipe->plane_r… in hwss_build_fast_sequence()
856 …block_sequence[*num_steps].params.power_on_mpc_mem_pwr_params.mpcc_id = current_mpc_pipe->plane_re… in hwss_build_fast_sequence()
982 params->update_visual_confirm_params.mpcc_id); in hwss_execute_sequence()
1073 int mpcc_id = params->power_on_mpc_mem_pwr_params.mpcc_id; in hwss_power_on_mpc_mem_pwr() local
1077 mpc->funcs->power_on_mpc_mem_pwr(mpc, mpcc_id, power_on); in hwss_power_on_mpc_mem_pwr()
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| /drivers/gpu/drm/amd/display/dc/hwss/ |
| A D | hw_sequencer.h | 116 int mpcc_id; member
121 int mpcc_id; member
433 int mpcc_id);
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| A D | dcn20_hwseq.c | 1001 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn20_program_output_csc() local
1004 mpc->funcs->power_on_mpc_mem_pwr(mpc, mpcc_id, true); in dcn20_program_output_csc()
1024 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn20_set_output_transfer_func() local
1035 mpc->funcs->power_on_mpc_mem_pwr(mpc, mpcc_id, true); in dcn20_set_output_transfer_func()
1056 mpc->funcs->set_output_gamma(mpc, mpcc_id, params); in dcn20_set_output_transfer_func()
2932 int mpcc_id; in dcn20_update_mpcc() local
2976 mpcc_id = hubp->inst; in dcn20_update_mpcc()
2994 dc->res_pool->mpc, mpcc_id); in dcn20_update_mpcc()
3003 mpcc_id); in dcn20_update_mpcc()
3008 hubp->mpcc_id = mpcc_id; in dcn20_update_mpcc()
[all …]
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| /drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| A D | dcn30_resource.h | 86 int mpcc_id,
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| /drivers/gpu/drm/amd/display/dc/hubp/dcn31/ |
| A D | dcn31_hubp.c | 118 hubp2->base.mpcc_id = 0xf; in hubp31_construct()
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| /drivers/gpu/drm/amd/display/dc/dcn201/ |
| A D | dcn201_mpc.c | 64 mpcc->mpcc_id = mpcc_inst; in mpc201_init_mpcc()
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| /drivers/gpu/drm/amd/display/dc/hubp/dcn201/ |
| A D | dcn201_hubp.c | 153 hubp201->base.mpcc_id = 0xf; in dcn201_hubp_construct()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| A D | dcn10_hwseq.c | 1640 hubp->mpcc_id = dpp->inst; in dcn10_init_pipes()
2843 int mpcc_id) in dcn10_update_visual_confirm_color() argument
2857 int mpcc_id; in dcn10_update_mpcc() local
2896 mpcc_id = hubp->inst; in dcn10_update_mpcc()
2900 mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id); in dcn10_update_mpcc()
2901 dc->hwss.update_visual_confirm_color(dc, pipe_ctx, mpcc_id); in dcn10_update_mpcc()
2906 new_mpcc = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, mpcc_id); in dcn10_update_mpcc()
2913 dc->res_pool->mpc, mpcc_id); in dcn10_update_mpcc()
2922 mpcc_id); in dcn10_update_mpcc()
2923 dc->hwss.update_visual_confirm_color(dc, pipe_ctx, mpcc_id); in dcn10_update_mpcc()
[all …]
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| /drivers/gpu/drm/amd/display/dc/hubp/dcn35/ |
| A D | dcn35_hubp.c | 238 hubp2->base.mpcc_id = 0xf; in hubp35_construct()
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| /drivers/gpu/drm/amd/display/dc/hubp/dcn32/ |
| A D | dcn32_hubp.c | 226 hubp2->base.mpcc_id = 0xf; in hubp32_construct()
|