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Searched refs:msg_reg (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/pm/swsmu/
A Dsmu_cmn.c139 msg_idx = RREG32(smu->msg_reg); in __smu_cmn_reg_print_error()
245 WREG32(smu->msg_reg, msg); in __smu_cmn_send_msg()
/drivers/gpu/drm/amd/pm/swsmu/inc/
A Damdgpu_smu.h609 u32 msg_reg; member
/drivers/gpu/drm/amd/pm/swsmu/smu13/
A Dsmu_v13_0_5_ppt.c1137 smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_2); in smu_v13_0_5_set_ppt_funcs()
A Dsmu_v13_0_4_ppt.c1128 smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66); in smu_v13_0_4_set_smu_mailbox_registers()
A Dsmu_v13_0.c2365 smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66); in smu_v13_0_set_smu_mailbox_registers()
A Dsmu_v13_0_0_ppt.c2975 smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66); in smu_v13_0_0_set_smu_mailbox_registers()
/drivers/gpu/drm/amd/pm/swsmu/smu12/
A Drenoir_ppt.c1503 smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66); in renoir_set_ppt_funcs()
/drivers/gpu/drm/amd/pm/swsmu/smu14/
A Dsmu_v14_0_0_ppt.c1708 smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66); in smu_v14_0_0_set_smu_mailbox_registers()
A Dsmu_v14_0_2_ppt.c2174 smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, regMP1_SMN_C2PMSG_66); in smu_v14_0_2_set_smu_mailbox_registers()
/drivers/gpu/drm/amd/pm/swsmu/smu11/
A Dsmu_v11_0.c2180 smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66); in smu_v11_0_set_smu_mailbox_registers()

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