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Searched refs:msix_idx (Results 1 – 20 of 20) sorted by relevance

/drivers/net/ethernet/intel/ice/
A Dice_base.h24 ice_cfg_txq_interrupt(struct ice_vsi *vsi, u16 txq, u16 msix_idx, u16 itr_idx);
26 ice_cfg_rxq_interrupt(struct ice_vsi *vsi, u16 rxq, u16 msix_idx, u16 itr_idx);
A Dice_base.c1059 ice_cfg_txq_interrupt(struct ice_vsi *vsi, u16 txq, u16 msix_idx, u16 itr_idx) in ice_cfg_txq_interrupt() argument
1068 FIELD_PREP(QINT_TQCTL_MSIX_INDX_M, msix_idx); in ice_cfg_txq_interrupt()
1091 ice_cfg_rxq_interrupt(struct ice_vsi *vsi, u16 rxq, u16 msix_idx, u16 itr_idx) in ice_cfg_rxq_interrupt() argument
1100 FIELD_PREP(QINT_RQCTL_MSIX_INDX_M, msix_idx); in ice_cfg_rxq_interrupt()
/drivers/net/ethernet/huawei/hinic3/
A Dhinic3_hwif.c12 void hinic3_set_msix_state(struct hinic3_hwdev *hwdev, u16 msix_idx, in hinic3_set_msix_state() argument
A Dhinic3_hwif.h53 void hinic3_set_msix_state(struct hinic3_hwdev *hwdev, u16 msix_idx,
/drivers/net/ethernet/huawei/hinic/
A Dhinic_hw_if.c136 void hinic_set_msix_state(struct hinic_hwif *hwif, u16 msix_idx, in hinic_set_msix_state() argument
139 u32 offset = msix_idx * HINIC_PCI_MSIX_ENTRY_SIZE + in hinic_set_msix_state()
A Dhinic_hw_if.h268 void hinic_set_msix_state(struct hinic_hwif *hwif, u16 msix_idx,
A Dhinic_ethtool.c684 u16 msix_idx; in set_queue_coalesce() local
700 msix_idx = set_rx_coal ? nic_dev->rxqs[q_id].rq->msix_entry : in set_queue_coalesce()
702 interrupt_info.msix_index = msix_idx; in set_queue_coalesce()
/drivers/net/ethernet/google/gve/
A Dgve_main.c554 int msix_idx = i; in gve_alloc_notify_blocks() local
559 err = request_irq(priv->msix_vectors[msix_idx].vector, in gve_alloc_notify_blocks()
567 block->irq = priv->msix_vectors[msix_idx].vector; in gve_alloc_notify_blocks()
584 int msix_idx = j; in gve_alloc_notify_blocks() local
586 irq_set_affinity_hint(priv->msix_vectors[msix_idx].vector, in gve_alloc_notify_blocks()
588 free_irq(priv->msix_vectors[msix_idx].vector, block); in gve_alloc_notify_blocks()
618 int msix_idx = i; in gve_free_notify_blocks() local
620 irq_set_affinity_hint(priv->msix_vectors[msix_idx].vector, in gve_free_notify_blocks()
622 free_irq(priv->msix_vectors[msix_idx].vector, block); in gve_free_notify_blocks()
/drivers/infiniband/hw/irdma/
A Dicrdma_hw.c62 if (dev->ceq_itr && dev->aeq->msix_idx != idx) in icrdma_ena_irq()
A Dmain.h196 u32 msix_idx; member
A Dtype.h397 u32 msix_idx; member
764 u32 msix_idx; member
A Dhw.c466 irdma_ena_intr(&rf->sc_dev, iwceq->msix_idx); in irdma_ceq_dpc()
1266 iwceq->msix_idx = msix_vec->idx; in irdma_setup_ceq_0()
1318 iwceq->msix_idx = msix_vec->idx; in irdma_setup_ceqs()
1414 info.msix_idx = rf->iw_msixtbl->idx; in irdma_create_aeq()
A Dctrl.c3917 aeq->msix_idx = info->msix_idx; in irdma_sc_aeq_init()
/drivers/dma/idxd/
A Dinit.c120 int msix_idx = i + 1; in idxd_setup_interrupts() local
122 ie = idxd_get_ie(idxd, msix_idx); in idxd_setup_interrupts()
123 ie->id = msix_idx; in idxd_setup_interrupts()
/drivers/net/ethernet/chelsio/cxgb4/
A Dcxgb4_main.c5865 unsigned int msix_idx; in cxgb4_get_msix_idx_from_bmap() local
5869 msix_idx = find_first_zero_bit(bmap->msix_bmap, bmap->mapsize); in cxgb4_get_msix_idx_from_bmap()
5870 if (msix_idx < bmap->mapsize) { in cxgb4_get_msix_idx_from_bmap()
5871 __set_bit(msix_idx, bmap->msix_bmap); in cxgb4_get_msix_idx_from_bmap()
5878 return msix_idx; in cxgb4_get_msix_idx_from_bmap()
5882 unsigned int msix_idx) in cxgb4_free_msix_idx_in_bmap() argument
5888 __clear_bit(msix_idx, bmap->msix_bmap); in cxgb4_free_msix_idx_in_bmap()
A Dcxgb4.h2148 void cxgb4_free_msix_idx_in_bmap(struct adapter *adap, u32 msix_idx);
/drivers/net/ethernet/emulex/benet/
A Dbe.h187 u8 msix_idx; member
A Dbe_cmds.h399 u16 msix_idx; /* available only in v2 */ member
A Dbe_cmds.c1033 eqo->msix_idx = in be_cmd_eq_create()
1034 (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx; in be_cmd_eq_create()
A Dbe_main.c3479 return adapter->msix_entries[eqo->msix_idx].vector; in be_msix_vec_get()

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