Searched refs:mul_shift (Results 1 – 7 of 7) sorted by relevance
| /drivers/clk/at91/ |
| A D | clk-pll.c | 20 #define PLL_MUL(reg, layout) (((reg) >> (layout)->mul_shift) & \
90 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_prepare()
359 .mul_shift = 16,
365 .mul_shift = 16,
371 .mul_shift = 16,
377 .mul_shift = 18,
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| A D | clk-sam9x60-pll.c | 99 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set()
114 (frac->mul << core->layout->mul_shift) | in sam9x60_frac_pll_set()
268 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set_rate_chg()
275 (frac->mul << core->layout->mul_shift) | in sam9x60_frac_pll_set_rate_chg()
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| A D | sam9x7.c | 145 .mul_shift = 24,
154 .mul_shift = 24,
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| A D | pmc.h | 63 u8 mul_shift; member
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| A D | sam9x60.c | 56 .mul_shift = 24,
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| A D | sama7d65.c | 76 .mul_shift = 24,
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| A D | sama7g5.c | 71 .mul_shift = 24,
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