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Searched refs:mux_flags (Results 1 – 25 of 30) sorted by relevance

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/drivers/clk/rockchip/
A Dclk.h691 u8 mux_flags; member
718 .mux_flags = mf, \
739 .mux_flags = mf, \
798 .mux_flags = mf, \
816 .mux_flags = mf, \
835 .mux_flags = mf, \
923 .mux_flags = mf, \
938 .mux_flags = mf, \
954 .mux_flags = mf, \
1104 .mux_flags = mf, \
[all …]
A Dclk.c42 int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, in rockchip_clk_register_branch() argument
65 mux->flags = mux_flags; in rockchip_clk_register_branch()
68 mux_ops = (mux_flags & CLK_MUX_READ_ONLY) ? &clk_mux_ro_ops in rockchip_clk_register_branch()
272 frac_mux->flags = child->mux_flags; in rockchip_clk_register_frac_branch()
533 list->mux_flags, list->mux_table, in rockchip_clk_register_branches()
541 list->mux_flags, &ctx->lock); in rockchip_clk_register_branches()
548 list->mux_flags); in rockchip_clk_register_branches()
580 list->mux_flags, list->div_shift, in rockchip_clk_register_branches()
605 list->mux_width, list->mux_flags, in rockchip_clk_register_branches()
A Dclk-half-divider.c162 u8 mux_width, u8 mux_flags, in rockchip_clk_register_halfdiv() argument
184 mux->flags = mux_flags; in rockchip_clk_register_halfdiv()
186 mux_ops = (mux_flags & CLK_MUX_READ_ONLY) ? &clk_mux_ro_ops in rockchip_clk_register_halfdiv()
A Dclk-muxgrf.c59 int shift, int width, int mux_flags) in rockchip_clk_register_muxgrf() argument
85 muxgrf_clock->flags = mux_flags; in rockchip_clk_register_muxgrf()
/drivers/pinctrl/renesas/
A Dpinctrl-rza1.c449 u8 mux_flags; member
677 u8 mux_flags = mux_conf->mux_flags; in rza1_pin_mux_single() local
685 if (mux_flags) in rza1_pin_mux_single()
686 mux_flags |= (mux_flags_from_table & MUX_FLAGS_BIDIR); in rza1_pin_mux_single()
688 mux_flags = mux_flags_from_table; in rza1_pin_mux_single()
690 if (mux_flags & MUX_FLAGS_BIDIR) in rza1_pin_mux_single()
726 if (mux_flags & (MUX_FLAGS_SWIO_INPUT | MUX_FLAGS_SWIO_OUTPUT)) in rza1_pin_mux_single()
728 mux_flags & MUX_FLAGS_SWIO_INPUT); in rza1_pin_mux_single()
960 mux_conf->mux_flags = pinmux_flags; in rza1_parse_pinmux_node()
/drivers/clk/mmp/
A Dclk.h79 u8 mux_flags; member
90 u8 mux_flags; member
200 u8 mux_flags; member
A Dclk-mix.c66 if (mix->mux_flags & CLK_MUX_INDEX_BIT) in _get_mux()
68 if (mix->mux_flags & CLK_MUX_INDEX_ONE) in _get_mux()
481 mix->mux_flags = config->mux_flags; in mmp_clk_register_mix()
A Dclk.c139 clks[i].mux_flags, in mmp_register_mux_clks()
/drivers/platform/chrome/
A Dcros_ec_typec.c339 port->mux_flags = USB_PD_MUX_NONE; in cros_typec_remove_partner()
648 if (port->mux_flags & USB_PD_MUX_HPD_IRQ) in cros_typec_enable_dp()
650 if (port->mux_flags & USB_PD_MUX_HPD_LVL) in cros_typec_enable_dp()
757 port->mux_flags = resp.flags; in cros_typec_configure_mux()
760 if (port->mux_flags == USB_PD_MUX_NONE) { in cros_typec_configure_mux()
765 if (port->mux_flags & USB_PD_MUX_POLARITY_INVERTED) in cros_typec_configure_mux()
780 if (port->mux_flags & USB_PD_MUX_USB4_ENABLED) { in cros_typec_configure_mux()
784 } else if (port->mux_flags & USB_PD_MUX_DP_ENABLED) { in cros_typec_configure_mux()
786 } else if (port->mux_flags & USB_PD_MUX_SAFE_MODE) { in cros_typec_configure_mux()
788 } else if (port->mux_flags & USB_PD_MUX_USB_ENABLED) { in cros_typec_configure_mux()
[all …]
A Dcros_ec_typec.h67 uint8_t mux_flags; member
A Dcros_typec_switch.c44 .mux_flags = state, in cros_typec_cmd_mux_set()
/drivers/clk/st/
A Dclkgen-mux.c42 u8 mux_flags; member
86 data->shift, data->width, data->mux_flags, in st_of_clkgen_mux_setup()
/drivers/clk/x86/
A Dclk-cgu.h179 unsigned long mux_flags; member
215 .mux_flags = _cf, \
276 .mux_flags = _freq, \
A Dclk-cgu.c35 list->flags, list->mux_flags); in lgm_clk_register_fixed()
84 unsigned long cflags = list->mux_flags; in lgm_clk_register_mux()
/drivers/clk/renesas/
A Drzg2l-cpg.h116 u32 mux_flags; member
180 .mux_flags = CLK_MUX_HIWORD_MASK)
185 .mux_flags = CLK_MUX_READ_ONLY)
A Dr9a09g077-cpg.c66 .flag = 0, .mux_flags = _mux_flags)
216 core->mux_flags, &pub->rmw_lock); in r9a09g077_cpg_mux_clk_register()
A Drzv2h-cpg.h179 u8 mux_flags; member
220 .mux_flags = CLK_MUX_HIWORD_MASK)
A Drenesas-cpg-mssr.h38 u8 mux_flags; member
/drivers/clk/mediatek/
A Dclk-mtk.h107 u8 mux_flags; member
125 .mux_flags = _muxflags, \
/drivers/clk/samsung/
A Dclk.h128 u8 mux_flags; member
141 .mux_flags = mf, \
A Dclk.c189 list->shift, list->width, list->mux_flags, &ctx->lock); in samsung_clk_register_mux()
/drivers/clk/hisilicon/
A Dclk.h52 u8 mux_flags; member
/drivers/clk/stm32/
A Dclk-stm32mp1.c363 u8 mux_flags; member
453 mux_cfg->width, mux_cfg->mux_flags, lock); in _clk_hw_register_mux()
500 mmux->mux.flags = cfg->mux->mux_flags; in _get_stm32_mux()
515 mux->flags = cfg->mux->mux_flags; in _get_stm32_mux()
1229 .mux_flags = _mux_flags,\
1350 .mux_flags = _mux_flags,\
1704 .mux_flags = _mux_flags,\
/drivers/clk/xilinx/
A Dxlnx_vcu.c443 u8 mux_flags = CLK_MUX_ROUND_CLOSEST; in xvcu_clk_hw_register_leaf() local
466 reg, 0, 1, mux_flags, lock); in xvcu_clk_hw_register_leaf()
/drivers/clk/
A Dclk-milbeaut.c96 unsigned long mux_flags; member
553 factors->mask, factors->mux_flags, in m10v_reg_mux_pre()

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