Searched refs:n_phy (Results 1 – 15 of 15) sorted by relevance
71 sas_phy->enabled = (phy_id < mvi->chip->n_phy) ? 1 : 0; in mvs_phy_init()211 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_alloc()346 ((struct mvs_prv_info *)sha->lldd_ha)->n_phy = mvi->chip->n_phy; in mvs_pci_alloc()391 phy_nr = core_nr * chip_info->n_phy; in mvs_prep_sas_ha_init()434 for (i = 0; i < chip_info->n_phy; i++) { in mvs_post_sas_ha_init()435 sha->sas_phy[j * chip_info->n_phy + i] = in mvs_post_sas_ha_init()437 sha->sas_port[j * chip_info->n_phy + i] = in mvs_post_sas_ha_init()446 sha->num_phys = nr_core * chip_info->n_phy; in mvs_post_sas_ha_init()464 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_init_sas_add()
80 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; in mvs_find_dev_mvi()107 phyno[n] = (j >= mvi->chip->n_phy) ? in mvs_find_dev_phyno()108 (j - mvi->chip->n_phy) : j; in mvs_find_dev_phyno()270 for (i = 0; i < mvi->chip->n_phy; ++i) in mvs_scan_start()1008 i + mvi->id * mvi->chip->n_phy; in mvs_update_phyinfo()1075 if (i >= mvi->chip->n_phy) in mvs_port_notify_formed()1076 port = &mvi->port[i - mvi->chip->n_phy]; in mvs_port_notify_formed()1765 phy_no+mvi->id*mvi->chip->n_phy); in mvs_sig_time_out()1790 phy_no + mvi->id*mvi->chip->n_phy); in mvs_int_port()1854 phy_no + mvi->id*mvi->chip->n_phy); in mvs_int_port()[all …]
34 if (mvi->chip->n_phy <= MVS_SOC_PORTS) in mvs_64xx_enable_xmt()56 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_64xx_phy_hacks()322 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_64xx_init()345 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_64xx_init()
164 u32 n_phy; member401 u8 n_phy; member
460 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_94xx_init()486 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_94xx_init()832 port_id + mvi->id * mvi->chip->n_phy, i, id_frame[i]); in mvs_94xx_get_att_identify_frame()
190 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_int_full()
565 for (i = 0; i < hisi_hba->n_phy; i++) { in reset_hw_v1_hw()574 for (i = 0; i < hisi_hba->n_phy; i++) { in reset_hw_v1_hw()685 for (i = 0; i < hisi_hba->n_phy; i++) { in init_reg_v1_hw()801 for (i = 0; i < hisi_hba->n_phy; i++) { in start_phys_v1_hw()812 for (i = 0; i < hisi_hba->n_phy; i++) { in phys_init_v1_hw()855 for (i = 0; i < hisi_hba->n_phy; i++) in get_wideport_bitmap_v1_hw()1630 for (i = 0; i < hisi_hba->n_phy; i++) { in interrupt_init_v1_hw()1649 idx = hisi_hba->n_phy * HISI_SAS_PHY_INT_NR; in interrupt_init_v1_hw()1664 idx = (hisi_hba->n_phy * HISI_SAS_PHY_INT_NR) + hisi_hba->queue_count; in interrupt_init_v1_hw()1689 for (i = 0; i < hisi_hba->n_phy; i++) { in interrupt_openall_v1_hw()[all …]
1024 if (hisi_hba->n_phy == 9) in reset_hw_v2_hw()1032 for (i = 0; i < hisi_hba->n_phy; i++) { in reset_hw_v2_hw()1041 for (i = 0; i < hisi_hba->n_phy; i++) { in reset_hw_v2_hw()1229 for (i = 0; i < hisi_hba->n_phy; i++) { in init_reg_v2_hw()1334 for (i = 0; i < hisi_hba->n_phy; i++) { in link_timeout_enable_link()1582 for (i = 0; i < hisi_hba->n_phy; i++) { in phys_init_v2_hw()1628 for (i = 0; i < (hisi_hba->n_phy < 9 ? hisi_hba->n_phy : 8); i++) in get_wideport_bitmap_v2_hw()1633 if (hisi_hba->n_phy == 9) { in get_wideport_bitmap_v2_hw()3426 for (i = 0; i < hisi_hba->n_phy; i++) { in interrupt_disable_v2_hw()3494 count = min(count, hisi_hba->n_phy); in write_gpio_v2_hw()[all …]
182 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) in hisi_sas_stop_phys()1072 sas_phy->enabled = (phy_no < hisi_hba->n_phy) ? 1 : 0; in hisi_sas_phy_init()1443 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { in hisi_sas_rescan_topology()1508 for (i = 0; i < hisi_hba->n_phy; i++) { in hisi_sas_send_ata_reset_each_phy()1543 for (port_no = 0; port_no < hisi_hba->n_phy; port_no++) { in hisi_sas_terminate_stp_reject()1611 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { in hisi_sas_controller_reset_done()2230 for (i = 0; i < hisi_hba->n_phy; i++) { in hisi_sas_alloc()2373 for (i = 0; i < hisi_hba->n_phy; i++) { in hisi_sas_free()2565 phy_nr = port_nr = hisi_hba->n_phy; in hisi_sas_probe()2594 sha->num_phys = hisi_hba->n_phy; in hisi_sas_probe()[all …]
667 for (i = 0; i < hisi_hba->n_phy; i++) { in interrupt_enable_v3_hw()712 for (i = 0; i < hisi_hba->n_phy; i++) { in init_reg_v3_hw()1125 for (i = 0; i < hisi_hba->n_phy; i++) { in phys_init_v3_hw()1155 for (i = 0; i < hisi_hba->n_phy; i++) in get_wideport_bitmap_v3_hw()2735 for (i = 0; i < hisi_hba->n_phy; i++) { in interrupt_disable_v3_hw()3444 if (hisi_hba->n_phy < 0 || hisi_hba->n_phy > 8) { in check_fw_info_v3_hw()3932 for (p = 0; p < hisi_hba->n_phy; p++) { in debugfs_create_files_v3_hw()4179 if (phy_no >= hisi_hba->n_phy) in debugfs_bist_phy_v3_hw_write()4670 for (i = 0; i < hisi_hba->n_phy; i++) { in debugfs_release_v3_hw()4981 phy_nr = port_nr = hisi_hba->n_phy; in hisi_sas_v3_probe()[all …]
422 int n_phy; member
166 sas_phy->enabled = (phy_id < pm8001_ha->chip->n_phy) ? 1 : 0; in pm8001_phy_init()323 pm8001_ha->chip->n_phy); in pm8001_alloc()338 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_alloc()612 phy_nr = chip_info->n_phy; in pm8001_prep_sas_ha_init()654 for (i = 0; i < chip_info->n_phy; i++) { in pm8001_post_sas_ha_init()664 sha->num_phys = chip_info->n_phy; in pm8001_post_sas_ha_init()688 for (i = 0; i < pm8001_ha->chip->n_phy; i++) in pm8001_init_sas_add()765 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_init_sas_add()922 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_set_phy_settings_ven_117c_12G()1421 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_pci_resume()
231 u32 n_phy; member
344 for (i = 0; i < pm8001_ha->chip->n_phy; ++i) { in pm8001_scan_start()
3634 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in mpi_hw_event()4934 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_set_phy_profile()
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