| /drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.c | 1490 next_odm_pipe->plane_res.mi = pool->mis[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm() 1491 next_odm_pipe->plane_res.hubp = pool->hubps[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm() 1492 next_odm_pipe->plane_res.ipp = pool->ipps[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm() 1494 next_odm_pipe->plane_res.dpp = pool->dpps[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm() 1497 if (prev_odm_pipe->next_odm_pipe && prev_odm_pipe->next_odm_pipe != next_odm_pipe) { in dcn20_split_stream_for_odm() 1498 next_odm_pipe->next_odm_pipe = prev_odm_pipe->next_odm_pipe; in dcn20_split_stream_for_odm() 1499 next_odm_pipe->next_odm_pipe->prev_odm_pipe = next_odm_pipe; in dcn20_split_stream_for_odm() 1502 prev_odm_pipe->top_pipe->next_odm_pipe->bottom_pipe = next_odm_pipe; in dcn20_split_stream_for_odm() 1503 next_odm_pipe->top_pipe = prev_odm_pipe->top_pipe->next_odm_pipe; in dcn20_split_stream_for_odm() 1509 prev_odm_pipe->next_odm_pipe = next_odm_pipe; in dcn20_split_stream_for_odm() [all …]
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| A D | dcn20_resource.h | 145 struct pipe_ctx *next_odm_pipe);
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| A D | dcn314_hwseq.c | 80 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in update_dsc_on_stream() 107 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in update_dsc_on_stream() 114 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in update_dsc_on_stream() 140 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in update_dsc_on_stream() 163 for (odm_pipe = odm_pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in get_odm_config() 203 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn314_update_odm() 215 if (!pipe_ctx->next_odm_pipe && current_pipe_ctx->next_odm_pipe && in dcn314_update_odm() 216 current_pipe_ctx->next_odm_pipe->stream_res.dsc) { in dcn314_update_odm() 217 struct display_stream_compressor *dsc = current_pipe_ctx->next_odm_pipe->stream_res.dsc; in dcn314_update_odm() 440 for (odm_pipe = pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn314_resync_fifo_dccg_dio()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| A D | dcn30_resource.c | 1541 if (pri_pipe->next_odm_pipe) { in dcn30_split_stream_for_mpc_or_odm() 1543 sec_pipe->next_odm_pipe = pri_pipe->next_odm_pipe; in dcn30_split_stream_for_mpc_or_odm() 1554 pri_pipe->next_odm_pipe = sec_pipe; in dcn30_split_stream_for_mpc_or_odm() 1731 pipe->prev_odm_pipe->next_odm_pipe = pipe->next_odm_pipe; in dcn30_internal_validate_bw() 1732 if (pipe->next_odm_pipe) in dcn30_internal_validate_bw() 1736 pipe->next_odm_pipe = NULL; in dcn30_internal_validate_bw() 1784 if (split[i] == 4 && old_pipe->next_odm_pipe && old_pipe->next_odm_pipe->next_odm_pipe) in dcn30_internal_validate_bw() 1785 old_index = old_pipe->next_odm_pipe->next_odm_pipe->pipe_idx; in dcn30_internal_validate_bw() 1829 if (odm && old_pipe->next_odm_pipe && old_pipe->next_odm_pipe->next_odm_pipe in dcn30_internal_validate_bw() 1830 && old_pipe->next_odm_pipe->next_odm_pipe->next_odm_pipe) in dcn30_internal_validate_bw() [all …]
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| /drivers/gpu/drm/amd/display/dc/link/ |
| A D | link_hwss_hpo_frl.c | 37 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in setup_hpo_frl_stream_attribute()
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| A D | link_dpms.c | 826 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in link_set_dsc_on_stream() 840 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in link_set_dsc_on_stream() 849 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in link_set_dsc_on_stream() 907 for (odm_pipe = pipe_ctx; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in link_set_dsc_on_stream() 971 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in link_set_dsc_pps_packet() 2537 !pipe_ctx->next_odm_pipe) { in link_set_dpms_on()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| A D | dcn32_hwseq.c | 1032 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in dcn32_update_dsc_on_stream() 1060 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in dcn32_update_dsc_on_stream() 1069 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn32_update_dsc_on_stream() 1095 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn32_update_dsc_on_stream() 1120 for (odm_pipe = odm_pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in get_odm_config() 1148 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn32_update_odm() 1164 if (!pipe_ctx->next_odm_pipe && current_pipe_ctx->next_odm_pipe && in dcn32_update_odm() 1165 current_pipe_ctx->next_odm_pipe->stream_res.dsc) { in dcn32_update_odm() 1166 struct display_stream_compressor *dsc = current_pipe_ctx->next_odm_pipe->stream_res.dsc; in dcn32_update_odm() 1283 for (odm_pipe = pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn32_resync_fifo_dccg_dio() [all …]
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| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | dcn32_fpu.c | 1895 if (pri_pipe->next_odm_pipe) { in dcn32_split_stream_for_mpc_or_odm() 1897 sec_pipe->next_odm_pipe = pri_pipe->next_odm_pipe; in dcn32_split_stream_for_mpc_or_odm() 1908 pri_pipe->next_odm_pipe = sec_pipe; in dcn32_split_stream_for_mpc_or_odm() 1968 pipe->prev_odm_pipe->next_odm_pipe = pipe->next_odm_pipe; in dcn32_apply_merge_split_flags_helper() 1969 if (pipe->next_odm_pipe) in dcn32_apply_merge_split_flags_helper() 2000 pipe->next_odm_pipe = NULL; in dcn32_apply_merge_split_flags_helper() 2050 if (split[i] == 4 && old_pipe->next_odm_pipe && old_pipe->next_odm_pipe->next_odm_pipe) in dcn32_apply_merge_split_flags_helper() 2051 old_index = old_pipe->next_odm_pipe->next_odm_pipe->pipe_idx; in dcn32_apply_merge_split_flags_helper() 2095 if (odm && old_pipe->next_odm_pipe && old_pipe->next_odm_pipe->next_odm_pipe in dcn32_apply_merge_split_flags_helper() 2096 && old_pipe->next_odm_pipe->next_odm_pipe->next_odm_pipe) in dcn32_apply_merge_split_flags_helper() [all …]
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| A D | dcn35_hwseq.c | 327 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in update_dsc_on_stream() 353 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in update_dsc_on_stream() 360 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in update_dsc_on_stream() 386 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in update_dsc_on_stream() 409 for (odm_pipe = odm_pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in get_odm_config() 449 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn35_update_odm() 461 if (!pipe_ctx->next_odm_pipe && current_pipe_ctx->next_odm_pipe && in dcn35_update_odm() 462 current_pipe_ctx->next_odm_pipe->stream_res.dsc) { in dcn35_update_odm() 463 struct display_stream_compressor *dsc = current_pipe_ctx->next_odm_pipe->stream_res.dsc; in dcn35_update_odm()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_resource.c | 2022 if (pipe->next_odm_pipe) in resource_get_dpp_pipes_for_plane() 2025 pipe = pipe->next_odm_pipe; in resource_get_dpp_pipes_for_plane() 2106 while (pipe->next_odm_pipe) { in resource_get_odm_slice_count() 2108 pipe = pipe->next_odm_pipe; in resource_get_odm_slice_count() 2247 if (pipe_a->next_odm_pipe && pipe_b->next_odm_pipe) { in resource_is_pipe_topology_changed() 2248 if (pipe_a->next_odm_pipe->pipe_idx != pipe_b->next_odm_pipe->pipe_idx) in resource_is_pipe_topology_changed() 2250 } else if (pipe_a->next_odm_pipe || pipe_b->next_odm_pipe) { in resource_is_pipe_topology_changed() 2270 if ((opp_head_a->next_odm_pipe && !opp_head_b->next_odm_pipe) || in resource_is_odm_topology_changed() 2271 (!opp_head_a->next_odm_pipe && opp_head_b->next_odm_pipe)) in resource_is_odm_topology_changed() 2461 while (opp_head->next_odm_pipe) in get_last_opp_head() [all …]
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| A D | dc_stream.c | 249 if (pipe_to_program->next_odm_pipe) in program_cursor_attributes() 250 dc->hwss.cursor_lock(dc, pipe_to_program->next_odm_pipe, true); in program_cursor_attributes() 262 if (pipe_to_program->next_odm_pipe) in program_cursor_attributes() 263 dc->hwss.cursor_lock(dc, pipe_to_program->next_odm_pipe, false); in program_cursor_attributes()
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| A D | dc_state.c | 163 if (cur_pipe->next_odm_pipe) in dc_state_copy_internal() 164 cur_pipe->next_odm_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->next_odm_pipe->pipe_idx]; in dc_state_copy_internal()
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| A D | dc_hw_sequencer.c | 879 current_pipe = current_pipe->next_odm_pipe; in hwss_build_fast_sequence() 910 if (!current_mpc_pipe->bottom_pipe && !current_mpc_pipe->next_odm_pipe && in hwss_build_fast_sequence() 920 current_pipe = current_pipe->next_odm_pipe; in hwss_build_fast_sequence()
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| A D | dc.c | 721 param.odm_mode = pipe->next_odm_pipe ? 1:0; in dc_stream_configure_crc() 2373 if (pipe->next_odm_pipe) in dc_commit_streams() 3600 struct pipe_ctx *odm_pipe = pipe_ctx->next_odm_pipe; in commit_planes_do_stream_update() 3610 odm_pipe = odm_pipe->next_odm_pipe; in commit_planes_do_stream_update() 4111 for (odm_pipe = mpcc_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in commit_planes_for_stream() 4452 if (pipe_ctx->bottom_pipe || pipe_ctx->next_odm_pipe || in commit_planes_for_stream()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource_helpers.c | 121 pipe->prev_odm_pipe->next_odm_pipe = pipe->next_odm_pipe; in dcn32_merge_pipes_for_subvp() 122 if (pipe->next_odm_pipe) in dcn32_merge_pipes_for_subvp() 123 pipe->next_odm_pipe->prev_odm_pipe = pipe->prev_odm_pipe; in dcn32_merge_pipes_for_subvp() 126 pipe->next_odm_pipe = NULL; in dcn32_merge_pipes_for_subvp()
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| A D | dcn32_resource.c | 2693 if ((old_primary_pipe->next_odm_pipe) && (old_primary_pipe->next_odm_pipe->bottom_pipe) in find_idle_secondary_pipe_check_mpo() 2695 next_odm_mpo_pipe = old_primary_pipe->next_odm_pipe->bottom_pipe; in find_idle_secondary_pipe_check_mpo()
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| /drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | dml2_mall_phantom.c | 114 pipe->prev_odm_pipe->next_odm_pipe = pipe->next_odm_pipe; in merge_pipes_for_subvp() 115 if (pipe->next_odm_pipe) in merge_pipes_for_subvp() 116 pipe->next_odm_pipe->prev_odm_pipe = pipe->prev_odm_pipe; in merge_pipes_for_subvp() 119 pipe->next_odm_pipe = NULL; in merge_pipes_for_subvp()
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| A D | dml2_dc_resource_mgmt.c | 170 pipe = pipe->next_odm_pipe; in find_pipes_assigned_to_plane() 279 existing_state->res_ctx.pipe_ctx[i].next_odm_pipe)) in find_preferred_pipe_candidates() 551 scratch->mpc_info.prev_odm_pipe->next_odm_pipe = pipe; in add_odm_slice_to_odm_tree() 554 pipe->next_odm_pipe = NULL; in add_odm_slice_to_odm_tree() 596 pipe = pipe->next_odm_pipe; in find_pipes_assigned_to_stream()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| A D | dcn20_hwseq.c | 737 pipe_ctx->next_odm_pipe = NULL; in dcn20_plane_atomic_disable() 812 struct pipe_ctx *odm_pipe = pipe_ctx->next_odm_pipe; in get_odm_segment_count() 817 odm_pipe = odm_pipe->next_odm_pipe; in get_odm_segment_count() 1191 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn20_update_odm() 1239 while (odm_pipe->next_odm_pipe) { in dcn20_blank_pixel_data() 1250 odm_pipe = odm_pipe->next_odm_pipe; in dcn20_blank_pixel_data() 1883 …for (other_pipe = pipe->next_odm_pipe; other_pipe != NULL; other_pipe = other_pipe->next_odm_pipe)… in dcn20_calculate_vready_offset_for_group() 2615 odm_pipe = odm_pipe->next_odm_pipe; in dcn20_disable_stream_gating() 2630 odm_pipe = odm_pipe->next_odm_pipe; in dcn20_enable_stream_gating() 2764 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn20_unblank_stream() [all …]
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn21/ |
| A D | dcn21_hwseq.c | 297 (pipe_ctx->prev_odm_pipe == NULL && pipe_ctx->next_odm_pipe == NULL)) in dcn21_is_abm_supported()
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| /drivers/gpu/drm/amd/display/dc/link/accessories/ |
| A D | link_dp_cts.c | 527 odm_pipe = odm_pipe->next_odm_pipe; in set_crtc_test_pattern() 559 odm_pipe = odm_pipe->next_odm_pipe; in set_crtc_test_pattern()
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| A D | core_types.h | 470 struct pipe_ctx *next_odm_pipe; member
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| A D | dcn10_hwseq.c | 1131 …for (other_pipe = pipe->next_odm_pipe; other_pipe != NULL; other_pipe = other_pipe->next_odm_pipe)… in calculate_vready_offset_for_group() 2339 while (pipe->next_odm_pipe) { in get_clock_divider() 2340 pipe = pipe->next_odm_pipe; in get_clock_divider() 3624 bool odm_combine_on = (pipe_ctx->next_odm_pipe != NULL) || in dcn10_set_cursor_position() 3780 if (pipe_ctx->next_odm_pipe) { in dcn10_set_cursor_position() 3782 pipe_ctx->next_odm_pipe->plane_res.scl_data.viewport.y; in dcn10_set_cursor_position()
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| /drivers/gpu/drm/amd/display/dc/ |
| A D | dc_dmub_srv.c | 835 } else if (subvp_pipe->next_odm_pipe) { in populate_subvp_cmd_pipe_info() 836 pipe_data->pipe_config.subvp_data.main_split_pipe_index = subvp_pipe->next_odm_pipe->pipe_idx; in populate_subvp_cmd_pipe_info() 850 } else if (phantom_pipe->next_odm_pipe) { in populate_subvp_cmd_pipe_info() 851 …pipe_data->pipe_config.subvp_data.phantom_split_pipe_index = phantom_pipe->next_odm_pipe->plane_re… in populate_subvp_cmd_pipe_info()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| A D | dcn401_hwseq.c | 1076 bool odm_combine_on = (pipe_ctx->next_odm_pipe != NULL) || in dcn401_set_cursor_position() 1740 for (odm_pipe = pipe_ctx; odm_pipe != NULL; odm_pipe = odm_pipe->next_odm_pipe) { in dcn401_perform_3dlut_wa_unlock() 1868 pipe_ctx->next_odm_pipe = NULL; in dcn401_reset_back_end_for_pipe() 1921 …for (other_pipe = pipe->next_odm_pipe; other_pipe != NULL; other_pipe = other_pipe->next_odm_pipe)… in dcn401_calculate_vready_offset_for_group()
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