| /drivers/input/joystick/ |
| A D | adc-joystick.c | 25 unsigned int num_chans; member
26 struct adc_joystick_axis axes[] __counted_by(num_chans);
43 for (i = 0; i < joy->num_chans; i++) { in adc_joystick_poll()
64 for (i = 0; i < joy->num_chans; ++i) { in adc_joystick_handle()
145 if (num_axes != joy->num_chans) { in adc_joystick_set_axes()
147 num_axes, joy->num_chans); in adc_joystick_set_axes()
200 unsigned int *num_chans) in adc_joystick_count_channels() argument
223 *num_chans = i; in adc_joystick_count_channels()
234 unsigned int num_chans; in adc_joystick_probe() local
256 &num_chans); in adc_joystick_probe()
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| /drivers/mailbox/ |
| A D | rockchip-mailbox.c | 31 int num_chans; member
84 writel_relaxed((1 << mb->mbox.num_chans) - 1, in rockchip_mbox_startup()
113 for (idx = 0; idx < mb->mbox.num_chans; idx++) { in rockchip_mbox_irq()
131 for (idx = 0; idx < mb->mbox.num_chans; idx++) { in rockchip_mbox_isr()
155 .num_chans = 4,
180 mb->chans = devm_kcalloc(&pdev->dev, drv_data->num_chans, in rockchip_mbox_probe()
185 mb->mbox.chans = devm_kcalloc(&pdev->dev, drv_data->num_chans, in rockchip_mbox_probe()
193 mb->mbox.num_chans = drv_data->num_chans; in rockchip_mbox_probe()
202 mb->buf_size = (size_t)resource_size(res) / (drv_data->num_chans * 2); in rockchip_mbox_probe()
218 for (i = 0; i < mb->mbox.num_chans; i++) { in rockchip_mbox_probe()
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| A D | qcom-ipcc.c | 59 int num_chans; member
179 for (chan_id = 0; chan_id < mbox->num_chans; chan_id++) { in qcom_ipcc_mbox_xlate()
190 if (chan_id >= mbox->num_chans) in qcom_ipcc_mbox_xlate()
222 ipcc->num_chans = 0; in qcom_ipcc_setup_mbox()
233 ipcc->num_chans++; in qcom_ipcc_setup_mbox()
238 if (!ipcc->num_chans) in qcom_ipcc_setup_mbox()
241 ipcc->chans = devm_kcalloc(dev, ipcc->num_chans, in qcom_ipcc_setup_mbox()
248 mbox->num_chans = ipcc->num_chans; in qcom_ipcc_setup_mbox()
336 if (ipcc->num_chans) in qcom_ipcc_probe()
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| A D | ast2700-mailbox.c | 25 u8 num_chans; member
63 for (n = 0; n < mb->mbox.num_chans; ++n) { in ast2700_mbox_irq()
170 mb->mbox.chans = devm_kcalloc(&pdev->dev, dev_data->num_chans, in ast2700_mbox_probe()
176 for (int i = 0; i < dev_data->num_chans; i++) { in ast2700_mbox_probe()
195 mb->mbox.num_chans = dev_data->num_chans; in ast2700_mbox_probe()
214 .num_chans = 4,
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| A D | arm_mhuv3.c | 312 unsigned int num_chans; member
353 unsigned int num_chans; member
579 for (i = 0; i < e->num_chans; i++) { in mhuv3_dbe_combined_irq_setup()
587 for (i = 0; i < e->num_chans; i++) { in mhuv3_dbe_combined_irq_setup()
602 chans = mbox->chans + mbox->num_chans; in mhuv3_dbe_channels_init()
603 e->base_ch_idx = mbox->num_chans; in mhuv3_dbe_channels_init()
604 for (i = 0; i < e->num_chans; i++) { in mhuv3_dbe_channels_init()
617 mbox->num_chans++; in mhuv3_dbe_channels_init()
688 if (channel >= e->num_chans) { in mhuv3_dbe_chan_from_comb_irq_get()
722 e->num_chans = in mhuv3_dbe_init()
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| A D | arm_mhu_db.c | 65 for (i = 0; i < mbox->num_chans; i++) { in mhu_db_mbox_to_channel()
171 for (i = 0; i < mbox->num_chans; i++) in mhu_db_shutdown()
175 if (mbox->num_chans == i) { in mhu_db_shutdown()
213 for (i = 0; i < mbox->num_chans; i++) in mhu_db_mbox_xlate()
217 if (mbox->num_chans == i) { in mhu_db_mbox_xlate()
290 mhu->mbox.num_chans = max_chans; in mhu_db_probe()
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| A D | exynos-mailbox.c | 52 if (msg->chan_id >= exynos_mbox->mbox->num_chans) { in exynos_mbox_send_data()
85 for (i = 0; i < mbox->num_chans; i++) in exynos_mbox_of_xlate()
127 mbox->num_chans = EXYNOS_MBOX_CHAN_COUNT; in exynos_mbox_probe()
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| A D | mailbox.c | 113 for (i = 0; i < mbox->num_chans; i++) { in txdone_hrtimer()
479 if (ind >= mbox->num_chans) in of_mbox_index_xlate()
496 if (!mbox || !mbox->dev || !mbox->ops || !mbox->num_chans) in mbox_controller_register()
517 for (i = 0; i < mbox->num_chans; i++) { in mbox_controller_register()
550 for (i = 0; i < mbox->num_chans; i++) in mbox_controller_unregister()
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| A D | mailbox-sti.c | 104 for (i = 0; i < mbox->num_chans; i++) { in sti_mbox_to_channel()
306 for (i = 0; i < mbox->num_chans; i++) in sti_mbox_shutdown_chan()
310 if (mbox->num_chans == i) { in sti_mbox_shutdown_chan()
340 for (i = 0; i < mbox->num_chans; i++) { in sti_mbox_xlate()
455 mbox->num_chans = STI_MBOX_CHAN_MAX; in sti_mbox_probe()
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| A D | stm32-ipcc.c | 296 ipcc->controller.num_chans = ipcc->n_chans; in stm32_ipcc_probe()
297 ipcc->controller.chans = devm_kcalloc(dev, ipcc->controller.num_chans, in stm32_ipcc_probe()
305 for (i = 0; i < ipcc->controller.num_chans; i++) in stm32_ipcc_probe()
319 ipcc->controller.num_chans, ipcc->proc_id); in stm32_ipcc_probe()
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| A D | mailbox-mchp-ipc-sbi.c | 365 if (chan_id >= ipc->controller.num_chans) { in mchp_ipc_mbox_xlate()
441 ipc->controller.num_chans = ipc_info.num_channels; in mchp_ipc_probe()
444 ipc->chans = devm_kcalloc(dev, ipc->controller.num_chans, sizeof(*ipc->chans), GFP_KERNEL); in mchp_ipc_probe()
455 for (chan_id = 0; chan_id < ipc->controller.num_chans; chan_id++) { in mchp_ipc_probe()
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| A D | tegra-hsp.c | 206 for_each_set_bit(master, &value, hsp->mbox_db.num_chans) { in tegra_hsp_doorbell_irq()
323 if (db->master >= chan->mbox->num_chans) { in tegra_hsp_doorbell_startup()
613 for (i = 0; i < mbox->num_chans; i++) { in tegra_hsp_db_xlate()
801 hsp->mbox_db.num_chans = 32; in tegra_hsp_probe()
805 hsp->mbox_db.chans = devm_kcalloc(&pdev->dev, hsp->mbox_db.num_chans, in tegra_hsp_probe()
829 hsp->mbox_sm.num_chans = hsp->num_sm; in tegra_hsp_probe()
833 hsp->mbox_sm.chans = devm_kcalloc(&pdev->dev, hsp->mbox_sm.num_chans, in tegra_hsp_probe()
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| A D | imx-mailbox.c | 699 if (chan >= mbox->num_chans) { in imx_mu_specific_xlate()
728 if (chan >= mbox->num_chans) { in imx_mu_xlate()
797 priv->mbox.num_chans = IMX_MU_CHANS; in imx_mu_init_generic()
821 int num_chans = priv->dcfg->type & IMX_MU_V2_S4 ? IMX_MU_S4_CHANS : IMX_MU_SCU_CHANS; in imx_mu_init_specific() local
823 for (i = 0; i < num_chans; i++) { in imx_mu_init_specific()
834 priv->mbox.num_chans = num_chans; in imx_mu_init_specific()
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| A D | cv1800-mailbox.c | 148 if (idx >= mbox->num_chans) in cv1800_mbox_xlate()
182 mb->mbox.num_chans = MAILBOX_MAX_CHAN; in cv1800_mbox_probe()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
| A D | dcn303_fpu.c | 173 bw_from_dram1 = uclk_mts * dcn3_03_soc.num_chans * in dcn303_get_optimal_dcfclk_fclk_for_uclk()
175 bw_from_dram2 = uclk_mts * dcn3_03_soc.num_chans * in dcn303_get_optimal_dcfclk_fclk_for_uclk()
207 if (dc->ctx->dc_bios->vram_info.num_chans) in dcn303_fpu_update_bw_bounding_box()
208 dcn3_03_soc.num_chans = dc->ctx->dc_bios->vram_info.num_chans; in dcn303_fpu_update_bw_bounding_box()
349 if (dcn3_03_soc.num_chans <= 4) { in dcn303_fpu_update_bw_bounding_box()
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| /drivers/firmware/samsung/ |
| A D | exynos-acpm.c | 52 u32 num_chans; member
173 u32 num_chans; member
420 if (xfer->acpm_chan_id >= acpm->num_chans) in acpm_do_xfer()
532 for (i = 0; i < acpm->num_chans; i++) in acpm_free_mbox_chans()
551 acpm->num_chans = readl(&shmem->num_chans); in acpm_channels_init()
552 acpm->chans = devm_kcalloc(dev, acpm->num_chans, sizeof(*acpm->chans), in acpm_channels_init()
559 for (i = 0; i < acpm->num_chans; i++) { in acpm_channels_init()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
| A D | dcn302_fpu.c | 175 bw_from_dram1 = uclk_mts * dcn3_02_soc.num_chans * in dcn302_get_optimal_dcfclk_fclk_for_uclk()
178 bw_from_dram2 = uclk_mts * dcn3_02_soc.num_chans * in dcn302_get_optimal_dcfclk_fclk_for_uclk()
211 if (dc->ctx->dc_bios->vram_info.num_chans) in dcn302_fpu_update_bw_bounding_box()
212 dcn3_02_soc.num_chans = dc->ctx->dc_bios->vram_info.num_chans; in dcn302_fpu_update_bw_bounding_box()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
| A D | dcn321_fpu.c | 149 .num_chans = 8,
168 entry->dram_speed_mts = bw_on_sdp / (dcn3_21_soc.num_chans * in get_optimal_ntuple()
174 entry->dram_speed_mts = bw_on_fabric / (dcn3_21_soc.num_chans * in get_optimal_ntuple()
177 float bw_on_dram = entry->dram_speed_mts * dcn3_21_soc.num_chans * in get_optimal_ntuple()
192 memory_bw_kbytes_sec = entry->dram_speed_mts * dcn3_21_soc.num_chans * in calculate_net_bw_in_kbytes_sec()
583 bw_from_dram1 = uclk_mts * dcn3_21_soc.num_chans * in dcn321_get_optimal_dcfclk_fclk_for_uclk()
585 bw_from_dram2 = uclk_mts * dcn3_21_soc.num_chans * in dcn321_get_optimal_dcfclk_fclk_for_uclk()
684 if (dc->ctx->dc_bios->vram_info.num_chans) { in dcn321_update_bw_bounding_box_fpu()
686 dcn3_21_soc.num_chans = dc->ctx->dc_bios->vram_info.num_chans; in dcn321_update_bw_bounding_box_fpu()
688 dc->ctx->dc_bios->vram_info.num_chans) * dc->caps.mall_size_per_mem_channel); in dcn321_update_bw_bounding_box_fpu()
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| /drivers/leds/flash/ |
| A D | leds-tps6131x.c | 318 u32 num_chans, steps_chan13, steps_chan2, steps_remaining; in tps6131x_brightness_set() local
331 num_chans = tps6131x->chan1_en + tps6131x->chan2_en + tps6131x->chan3_en; in tps6131x_brightness_set()
339 steps_chan13 = min_t(u32, steps_remaining / num_chans, in tps6131x_brightness_set()
406 u32 num_chans; in tps6131x_flash_brightness_set() local
412 num_chans = tps6131x->chan1_en + tps6131x->chan2_en + tps6131x->chan3_en; in tps6131x_flash_brightness_set()
413 steps_chan13 = min_t(u32, steps_remaining / num_chans, in tps6131x_flash_brightness_set()
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| /drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | dml2_policy.c | 37 entry->dram_speed_mts = bw_on_sdp / (socbb->num_chans * in get_optimal_ntuple()
43 entry->dram_speed_mts = bw_on_fabric / (socbb->num_chans * in get_optimal_ntuple()
46 float bw_on_dram = (float)(entry->dram_speed_mts * socbb->num_chans * in get_optimal_ntuple()
57 float memory_bw_mbytes_sec = (float)(entry->dram_speed_mts * socbb->num_chans * in calculate_net_bw_in_mbytes_sec()
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| /drivers/firmware/ |
| A D | arm_scpi.c | 252 int num_chans; member
491 scpi_info->num_chans; in scpi_send_message()
865 for (i = 0; i < info->num_chans; i++) in scpi_free_channels()
938 for (; scpi_drvinfo->num_chans < count; scpi_drvinfo->num_chans++) { in scpi_probe()
940 int idx = scpi_drvinfo->num_chans; in scpi_probe()
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| /drivers/firmware/arm_scmi/ |
| A D | raw_mode.c | 1139 u8 *channels, int num_chans) in scmi_raw_mode_setup() argument
1158 if (num_chans > 1) { in scmi_raw_mode_setup()
1161 for (i = 0; i < num_chans; i++) { in scmi_raw_mode_setup()
1215 u8 *channels, int num_chans, in scmi_raw_mode_init() argument
1235 ret = scmi_raw_mode_setup(raw, channels, num_chans); in scmi_raw_mode_init()
1269 if (num_chans > 1) { in scmi_raw_mode_init()
1275 for (i = 0; i < num_chans; i++) { in scmi_raw_mode_init()
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| A D | raw_mode.h | 22 u8 *channels, int num_chans,
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_socbb.h | 69 uint32_t num_chans; member
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| /drivers/gpu/drm/amd/display/dc/dml/dcn10/ |
| A D | dcn10_fpu.c | 120 .num_chans = 2,
|