Searched refs:num_heads (Results 1 – 10 of 10) sorted by relevance
| /drivers/gpu/drm/qxl/ |
| A D | qxl_drv.c | 66 MODULE_PARM_DESC(num_heads, "Number of virtual crtcs to expose (default 4)");
67 module_param_named(num_heads, qxl_num_crtc, int, 0400);
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | dce_v8_0.c | 658 u32 num_heads; /* number of active crtcs */ member
852 (wm->num_heads * cursor_line_pair_return_time); in dce_v8_0_latency_watermark()
858 if (wm->num_heads == 0) in dce_v8_0_latency_watermark()
872 b.full = dfixed_const(wm->num_heads); in dce_v8_0_latency_watermark()
981 u32 lb_size, u32 num_heads) in dce_v8_0_program_watermarks() argument
990 if (amdgpu_crtc->base.enabled && num_heads && mode) { in dce_v8_0_program_watermarks()
1022 wm_high.num_heads = num_heads; in dce_v8_0_program_watermarks()
1061 wm_low.num_heads = num_heads; in dce_v8_0_program_watermarks()
1116 u32 num_heads = 0, lb_size; in dce_v8_0_bandwidth_update() local
1123 num_heads++; in dce_v8_0_bandwidth_update()
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| A D | dce_v6_0.c | 558 u32 num_heads; /* number of active crtcs */ member
752 (wm->num_heads * cursor_line_pair_return_time); in dce_v6_0_latency_watermark()
758 if (wm->num_heads == 0) in dce_v6_0_latency_watermark()
772 b.full = dfixed_const(wm->num_heads); in dce_v6_0_latency_watermark()
827 (dce_v6_0_available_bandwidth(wm) / wm->num_heads)) in dce_v6_0_average_bandwidth_vs_available_bandwidth()
881 u32 lb_size, u32 num_heads) in dce_v6_0_program_watermarks() argument
895 if (amdgpu_crtc->base.enabled && num_heads && mode) { in dce_v6_0_program_watermarks()
931 wm_high.num_heads = num_heads; in dce_v6_0_program_watermarks()
958 wm_low.num_heads = num_heads; in dce_v6_0_program_watermarks()
1130 u32 num_heads = 0, lb_size; in dce_v6_0_bandwidth_update() local
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| A D | dce_v10_0.c | 705 u32 num_heads; /* number of active crtcs */ member
899 (wm->num_heads * cursor_line_pair_return_time); in dce_v10_0_latency_watermark()
905 if (wm->num_heads == 0) in dce_v10_0_latency_watermark()
919 b.full = dfixed_const(wm->num_heads); in dce_v10_0_latency_watermark()
1028 u32 lb_size, u32 num_heads) in dce_v10_0_program_watermarks() argument
1037 if (amdgpu_crtc->base.enabled && num_heads && mode) { in dce_v10_0_program_watermarks()
1069 wm_high.num_heads = num_heads; in dce_v10_0_program_watermarks()
1108 wm_low.num_heads = num_heads; in dce_v10_0_program_watermarks()
1161 u32 num_heads = 0, lb_size; in dce_v10_0_bandwidth_update() local
1168 num_heads++; in dce_v10_0_bandwidth_update()
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| A D | dce_v11_0.c | 737 u32 num_heads; /* number of active crtcs */ member
931 (wm->num_heads * cursor_line_pair_return_time); in dce_v11_0_latency_watermark()
937 if (wm->num_heads == 0) in dce_v11_0_latency_watermark()
951 b.full = dfixed_const(wm->num_heads); in dce_v11_0_latency_watermark()
1060 u32 lb_size, u32 num_heads) in dce_v11_0_program_watermarks() argument
1069 if (amdgpu_crtc->base.enabled && num_heads && mode) { in dce_v11_0_program_watermarks()
1101 wm_high.num_heads = num_heads; in dce_v11_0_program_watermarks()
1140 wm_low.num_heads = num_heads; in dce_v11_0_program_watermarks()
1193 u32 num_heads = 0, lb_size; in dce_v11_0_bandwidth_update() local
1200 num_heads++; in dce_v11_0_bandwidth_update()
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| /drivers/gpu/drm/tegra/ |
| A D | hub.h | 48 unsigned int num_heads; member
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| A D | hub.c | 972 unsigned int i = hub->num_heads; in tegra_display_hub_runtime_suspend()
1016 for (i = 0; i < hub->num_heads; i++) { in tegra_display_hub_runtime_resume()
1119 hub->num_heads = of_get_child_count(pdev->dev.of_node); in tegra_display_hub_probe()
1121 hub->clk_heads = devm_kcalloc(&pdev->dev, hub->num_heads, sizeof(clk), in tegra_display_hub_probe()
1126 for (i = 0; i < hub->num_heads; i++) { in tegra_display_hub_probe()
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| /drivers/gpu/drm/radeon/ |
| A D | evergreen.c | 1944 u32 num_heads; /* number of active crtcs */ member
2073 (wm->num_heads * cursor_line_pair_return_time); in evergreen_latency_watermark()
2078 if (wm->num_heads == 0) in evergreen_latency_watermark()
2092 b.full = dfixed_const(wm->num_heads); in evergreen_latency_watermark()
2123 (evergreen_available_bandwidth(wm) / wm->num_heads)) in evergreen_average_bandwidth_vs_available_bandwidth()
2157 u32 lb_size, u32 num_heads) in evergreen_program_watermarks() argument
2172 if (radeon_crtc->base.enabled && num_heads && mode) { in evergreen_program_watermarks()
2207 wm_high.num_heads = num_heads; in evergreen_program_watermarks()
2234 wm_low.num_heads = num_heads; in evergreen_program_watermarks()
2328 u32 num_heads = 0, lb_size; in evergreen_bandwidth_update() local
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| A D | si.c | 2043 u32 num_heads; /* number of active crtcs */ member
2189 (wm->num_heads * cursor_line_pair_return_time); in dce6_latency_watermark()
2195 if (wm->num_heads == 0) in dce6_latency_watermark()
2209 b.full = dfixed_const(wm->num_heads); in dce6_latency_watermark()
2242 (dce6_available_bandwidth(wm) / wm->num_heads)) in dce6_average_bandwidth_vs_available_bandwidth()
2276 u32 lb_size, u32 num_heads) in dce6_program_watermarks() argument
2290 if (radeon_crtc->base.enabled && num_heads && mode) { in dce6_program_watermarks()
2329 wm_high.num_heads = num_heads; in dce6_program_watermarks()
2356 wm_low.num_heads = num_heads; in dce6_program_watermarks()
2444 u32 num_heads = 0, lb_size; in dce6_bandwidth_update() local
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| A D | cik.c | 8926 u32 num_heads; /* number of active crtcs */ member
9120 (wm->num_heads * cursor_line_pair_return_time); in dce8_latency_watermark()
9126 if (wm->num_heads == 0) in dce8_latency_watermark()
9140 b.full = dfixed_const(wm->num_heads); in dce8_latency_watermark()
9195 (dce8_available_bandwidth(wm) / wm->num_heads)) in dce8_average_bandwidth_vs_available_bandwidth()
9249 u32 lb_size, u32 num_heads) in dce8_program_watermarks() argument
9258 if (radeon_crtc->base.enabled && num_heads && mode) { in dce8_program_watermarks()
9291 wm_high.num_heads = num_heads; in dce8_program_watermarks()
9331 wm_low.num_heads = num_heads; in dce8_program_watermarks()
9386 u32 num_heads = 0, lb_size; in dce8_bandwidth_update() local
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