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Searched refs:num_lm (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_rm.c243 int num_cwb_mux = topology->num_lm, cwb_mux_count = 0; in _dpu_rm_reserve_cwb_mux_and_pingpongs()
366 if (!topology->num_lm) { in _dpu_rm_reserve_lms()
367 DPU_ERROR("invalid number of lm: %d\n", topology->num_lm); in _dpu_rm_reserve_lms()
373 lm_count < topology->num_lm; i++) { in _dpu_rm_reserve_lms()
389 if (lm_count < topology->num_lm) { in _dpu_rm_reserve_lms()
411 if (lm_count != topology->num_lm) { in _dpu_rm_reserve_lms()
776 topology->num_lm, topology->num_dsc, in dpu_rm_reserve()
A Ddpu_crtc.c1355 topology.num_lm = 2; in dpu_crtc_get_topology()
1357 topology.num_lm = 2; in dpu_crtc_get_topology()
1359 topology.num_lm = (mode->hdisplay > MAX_HDISPLAY_SPLIT) ? 2 : 1; in dpu_crtc_get_topology()
1361 topology.num_lm = 1; in dpu_crtc_get_topology()
1364 topology.num_dspp = topology.num_lm; in dpu_crtc_get_topology()
1375 int i, num_lm, num_ctl, num_dspp; in dpu_crtc_assign_resources() local
1406 num_lm = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, in dpu_crtc_assign_resources()
1415 for (i = 0; i < num_lm; i++) { in dpu_crtc_assign_resources()
1424 cstate->num_mixers = num_lm; in dpu_crtc_assign_resources()
A Ddpu_rm.h61 u32 num_lm; member
A Ddpu_encoder.c2173 int i, num_lm; in dpu_encoder_helper_reset_mixers() local
2187 num_lm = dpu_rm_get_assigned_resources(&phys_enc->dpu_kms->rm, global_state, in dpu_encoder_helper_reset_mixers()
2190 for (i = 0; i < num_lm; i++) { in dpu_encoder_helper_reset_mixers()

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