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Searched refs:num_outputs (Results 1 – 22 of 22) sorted by relevance

/drivers/pwm/
A Dpwm-lp3943.c42 pwm_map->num_outputs = pdata->pwms[hwpwm]->num_outputs; in lp3943_pwm_request_map()
44 for (i = 0; i < pwm_map->num_outputs; i++) { in lp3943_pwm_request_map()
73 for (i = 0; i < pwm_map->num_outputs; i++) { in lp3943_pwm_free_map()
139 for (i = 0; i < pwm_map->num_outputs; i++) { in lp3943_pwm_set_mode()
221 int i, err, num_outputs, count = 0; in lp3943_pwm_parse_dt() local
236 num_outputs = of_property_count_u32_elems(node, name[i]); in lp3943_pwm_parse_dt()
237 if (num_outputs <= 0) in lp3943_pwm_parse_dt()
240 output = devm_kcalloc(dev, num_outputs, sizeof(*output), in lp3943_pwm_parse_dt()
246 num_outputs); in lp3943_pwm_parse_dt()
255 pwm_map->num_outputs = num_outputs; in lp3943_pwm_parse_dt()
/drivers/regulator/
A Dmax20086-regulator.c50 unsigned int num_outputs; member
108 for (i = 0; i < chip->info->num_outputs; i++) { in max20086_regulators_register()
147 matches = devm_kcalloc(chip->dev, chip->info->num_outputs, in max20086_parse_regulators_dt()
152 for (i = 0; i < chip->info->num_outputs; ++i) in max20086_parse_regulators_dt()
156 chip->info->num_outputs); in max20086_parse_regulators_dt()
164 for (i = 0; i < chip->info->num_outputs; i++) { in max20086_parse_regulators_dt()
285 .num_outputs = 4,
290 .num_outputs = 4,
295 .num_outputs = 2,
300 .num_outputs = 2,
/drivers/media/test-drivers/vivid/
A Dvivid-core.c149 module_param_array(num_outputs, uint, NULL, 0444);
979 dev->num_outputs = num_outputs[inst]; in vivid_detect_feature_set()
981 if (dev->num_outputs < 1) in vivid_detect_feature_set()
982 dev->num_outputs = 1; in vivid_detect_feature_set()
984 dev->num_outputs = 0; in vivid_detect_feature_set()
986 if (dev->num_outputs >= MAX_OUTPUTS) in vivid_detect_feature_set()
987 dev->num_outputs = MAX_OUTPUTS; in vivid_detect_feature_set()
988 for (i = 0; i < dev->num_outputs; i++) { in vivid_detect_feature_set()
1000 dev->num_outputs--; in vivid_detect_feature_set()
1920 for (int j = 0, k = 0; j < dev->num_outputs; ++j) in vivid_create_instance()
[all …]
A Dvivid-core.h273 u8 num_outputs; member
A Dvivid-vid-out.c960 if (out->index >= dev->num_outputs) in vidioc_enum_output()
994 if (o >= dev->num_outputs) in vidioc_s_output()
A Dvivid-vid-common.c1093 if (edid->pad >= dev->num_outputs) in vidioc_g_edid()
A Dvivid-vid-cap.c1553 if (!dev || !dev->num_outputs) in vivid_update_outputs()
1555 for (unsigned int i = 0, j = 0; i < dev->num_outputs; i++) { in vivid_update_outputs()
/drivers/clk/
A Dclk-cdce925.c30 int num_outputs; member
743 for (i = 1; i < data->chip_info->num_outputs; ++i) { in cdce925_probe()
802 .num_outputs = 3,
807 .num_outputs = 5,
812 .num_outputs = 7,
817 .num_outputs = 9,
A Dclk-si5341.c80 u8 num_outputs; member
968 if (idx >= data->num_outputs) { in of_clk_si5341_get()
1014 data->num_outputs = SI5340_MAX_NUM_OUTPUTS; in si5341_probe_chip_id()
1020 data->num_outputs = SI5341_MAX_NUM_OUTPUTS; in si5341_probe_chip_id()
1026 data->num_outputs = SI5342_MAX_NUM_OUTPUTS; in si5341_probe_chip_id()
1032 data->num_outputs = SI5344_MAX_NUM_OUTPUTS; in si5341_probe_chip_id()
1038 data->num_outputs = SI5345_MAX_NUM_OUTPUTS; in si5341_probe_chip_id()
1082 for (i = 0; i < data->num_outputs; ++i) { in si5341_read_settings()
1720 for (i = 0; i < data->num_outputs; ++i) { in si5341_probe()
A Dclk-versaclock7.c114 const unsigned int num_outputs; member
183 if (idx >= vc7->chip_info->num_outputs) in vc7_of_clk_get()
1176 for (i = 0; i < vc7->chip_info->num_outputs; i++) { in vc7_probe()
1257 .num_outputs = 8,
/drivers/gpu/drm/vmwgfx/
A Dvmwgfx_kms.c1409 if (!arg->num_outputs) { in vmw_kms_update_layout_ioctl()
1415 } else if (arg->num_outputs > VMWGFX_NUM_DISPLAY_UNITS) { in vmw_kms_update_layout_ioctl()
1419 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect); in vmw_kms_update_layout_ioctl()
1420 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect), in vmw_kms_update_layout_ioctl()
1435 VMW_DEBUG_KMS("Layout count = %u\n", arg->num_outputs); in vmw_kms_update_layout_ioctl()
1436 for (i = 0; i < arg->num_outputs; i++) { in vmw_kms_update_layout_ioctl()
1474 ret = vmw_kms_check_display_memory(dev, arg->num_outputs, drm_rects); in vmw_kms_update_layout_ioctl()
1477 vmw_du_update_layout(dev_priv, arg->num_outputs, drm_rects); in vmw_kms_update_layout_ioctl()
/drivers/net/ethernet/intel/ice/
A Dice_dpll.c3109 int num_outputs = pf->dplls.num_outputs; in ice_dpll_deinit_pins() local
3125 &ice_dpll_output_ops, num_outputs); in ice_dpll_deinit_pins()
3127 &ice_dpll_output_ops, num_outputs); in ice_dpll_deinit_pins()
3128 ice_dpll_release_pins(outputs, num_outputs); in ice_dpll_deinit_pins()
3170 pf->dplls.num_outputs, in ice_dpll_init_pins()
3176 count += pf->dplls.num_outputs; in ice_dpll_init_pins()
3226 pf->dplls.num_outputs, in ice_dpll_init_pins()
3383 pin_num = pf->dplls.num_outputs; in ice_dpll_init_info_pins_generic()
3454 num_pins = pf->dplls.num_outputs; in ice_dpll_init_info_direct_pins()
3688 d->num_outputs = abilities.num_outputs; in ice_dpll_init_info()
[all …]
A Dice_dpll.h126 u8 num_outputs; member
A Dice_adminq_cmd.h2191 u8 num_outputs; member
/drivers/media/platform/xilinx/
A Dxilinx-dma.c179 unsigned int num_outputs = 0; in xvip_pipeline_validate() local
193 num_outputs++; in xvip_pipeline_validate()
200 if (num_outputs != 1 || num_inputs > 1) in xvip_pipeline_validate()
203 pipe->num_dmas = num_inputs + num_outputs; in xvip_pipeline_validate()
/drivers/gpu/drm/vc4/
A Dvc4_kms.c1004 unsigned int num_outputs; in vc4_core_clock_atomic_check() local
1043 num_outputs = 0; in vc4_core_clock_atomic_check()
1048 num_outputs++; in vc4_core_clock_atomic_check()
1055 if (num_outputs > 1) { in vc4_core_clock_atomic_check()
/drivers/media/platform/mediatek/mdp3/
A Dmdp_sm_mt8183.h124 u32 num_outputs; member
A Dmtk-img-ipi.h92 u32 num_outputs; member
A Dmdp_sm_mt8195.h255 u32 num_outputs; member
A Dmtk-mdp3-m2m.c80 param.num_outputs = 1; in mdp_m2m_device_run()
A Dmtk-mdp3-cmdq.c601 for (i = 0; i < param->param->num_outputs; i++) { in mdp_cmdq_prepare()
A Dmtk-mdp3-comp.c2002 idx = CFG_COMP(MT8183, param, num_outputs); in mdp_comp_ctx_config()
2004 idx = CFG_COMP(MT8195, param, num_outputs); in mdp_comp_ctx_config()

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