| /drivers/gpu/drm/scheduler/ |
| A D | sched_main.c | 1122 for (i = DRM_SCHED_PRIORITY_KERNEL; i < sched->num_rqs; i++) { in drm_sched_select_entity()
1332 if (args->num_rqs > DRM_SCHED_PRIORITY_COUNT) { in drm_sched_init()
1358 sched->sched_rq = kmalloc_array(args->num_rqs, sizeof(*sched->sched_rq), in drm_sched_init()
1362 sched->num_rqs = args->num_rqs; in drm_sched_init()
1363 for (i = DRM_SCHED_PRIORITY_KERNEL; i < sched->num_rqs; i++) { in drm_sched_init()
1429 for (i = DRM_SCHED_PRIORITY_KERNEL; i < sched->num_rqs; i++) { in drm_sched_fini()
1488 for (i = DRM_SCHED_PRIORITY_HIGH; i < sched->num_rqs; i++) { in drm_sched_increase_karma()
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| A D | sched_entity.c | 93 if (entity->priority >= sched_list[0]->num_rqs) { in drm_sched_entity_init()
95 entity->priority, sched_list[0]->num_rqs); in drm_sched_entity_init()
96 entity->priority = max_t(s32, (s32) sched_list[0]->num_rqs - 1, in drm_sched_entity_init()
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| /drivers/net/ethernet/huawei/hinic/ |
| A D | hinic_hw_qp_ctxt.h | 129 #define HINIC_RQ_CTXT_SIZE(num_rqs) (sizeof(struct hinic_qp_ctxt_header) \ argument
130 + (num_rqs) * sizeof(struct hinic_rq_ctxt))
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| A D | hinic_hw_io.c | 150 u16 num_rqs) in write_rq_ctxts() argument
171 num_rqs, func_to_io->max_qps); in write_rq_ctxts()
172 for (i = 0; i < num_rqs; i++) { in write_rq_ctxts()
179 cmdq_buf.size = HINIC_RQ_CTXT_SIZE(num_rqs); in write_rq_ctxts()
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| A D | hinic_port.h | 316 u32 num_rqs; member
795 int hinic_set_max_qnum(struct hinic_dev *nic_dev, u8 num_rqs);
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| A D | hinic_port.c | 480 int hinic_set_max_qnum(struct hinic_dev *nic_dev, u8 num_rqs) in hinic_set_max_qnum() argument
490 rq_num.num_rqs = num_rqs; in hinic_set_max_qnum()
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| /drivers/gpu/drm/xe/ |
| A D | xe_gpu_scheduler.c | 69 .num_rqs = 1, in xe_sched_init()
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| A D | xe_execlist.c | 341 .num_rqs = 1, in execlist_exec_queue_init()
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| /drivers/gpu/drm/etnaviv/ |
| A D | etnaviv_sched.c | 145 .num_rqs = DRM_SCHED_PRIORITY_COUNT, in etnaviv_sched_init()
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| /drivers/gpu/drm/msm/ |
| A D | msm_ringbuffer.c | 70 .num_rqs = DRM_SCHED_PRIORITY_COUNT, in msm_ringbuffer_new()
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| A D | msm_gem_vma.c | 780 .num_rqs = 1, in msm_gem_vm_create()
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| /drivers/gpu/drm/scheduler/tests/ |
| A D | mock_scheduler.c | 293 .num_rqs = DRM_SCHED_PRIORITY_COUNT, in drm_mock_sched_new()
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| /drivers/scsi/elx/libefc_sli/ |
| A D | sli4.c | 427 sli_cmd_rq_create_v2(struct sli4 *sli4, u32 num_rqs, in sli_cmd_rq_create_v2() argument
439 page_count = sli_page_count(qs[0]->dma.size, SLI_PAGE_SIZE) * num_rqs; in sli_cmd_rq_create_v2()
468 req->rq_count = num_rqs; in sli_cmd_rq_create_v2()
473 for (i = 0; i < num_rqs; i++) { in sli_cmd_rq_create_v2()
590 u32 num_rqs = num_rq_pairs * 2; in sli_fc_rq_set_alloc() local
592 for (i = 0; i < num_rqs; i++) { in sli_fc_rq_set_alloc()
600 if (sli_cmd_rq_create_v2(sli4, num_rqs, qs, base_cq_id, in sli_fc_rq_set_alloc()
623 for (i = 0; i < num_rqs; i++) { in sli_fc_rq_set_alloc()
638 for (i = 0; i < num_rqs; i++) in sli_fc_rq_set_alloc()
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| /drivers/gpu/drm/nouveau/ |
| A D | nouveau_sched.c | 422 .num_rqs = DRM_SCHED_PRIORITY_COUNT, in nouveau_sched_init()
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_job.c | 441 for (i = DRM_SCHED_PRIORITY_KERNEL; i < sched->num_rqs; i++) { in amdgpu_job_stop_all_jobs_on_sched()
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| A D | amdgpu_device.c | 2977 .num_rqs = DRM_SCHED_PRIORITY_COUNT, in amdgpu_device_init_schedulers()
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| /drivers/gpu/drm/lima/ |
| A D | lima_sched.c | 522 .num_rqs = DRM_SCHED_PRIORITY_COUNT, in lima_sched_pipe_init()
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| /drivers/gpu/drm/panfrost/ |
| A D | panfrost_job.c | 841 .num_rqs = DRM_SCHED_PRIORITY_COUNT, in panfrost_job_init()
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| /drivers/gpu/drm/v3d/ |
| A D | v3d_sched.c | 861 .num_rqs = DRM_SCHED_PRIORITY_COUNT, in v3d_queue_sched_init()
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| /drivers/accel/amdxdna/ |
| A D | aie2_ctx.c | 524 .num_rqs = DRM_SCHED_PRIORITY_COUNT, in aie2_hwctx_init()
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| /drivers/gpu/drm/imagination/ |
| A D | pvr_queue.c | 1231 .num_rqs = 1, in pvr_queue_create()
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| /drivers/gpu/drm/panthor/ |
| A D | panthor_mmu.c | 2295 .num_rqs = 1, in panthor_vm_create()
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| A D | panthor_sched.c | 3293 .num_rqs = 1, in group_create_queue()
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