| /drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| A D | dcn314_hwseq.c | 76 struct pipe_ctx *odm_pipe; in update_dsc_on_stream() local 80 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in update_dsc_on_stream() 114 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in update_dsc_on_stream() 140 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in update_dsc_on_stream() 142 odm_pipe->stream_res.dsc->funcs->dsc_disable(odm_pipe->stream_res.dsc); in update_dsc_on_stream() 152 struct pipe_ctx *odm_pipe; in get_odm_config() local 155 for (odm_pipe = pipe_ctx; odm_pipe->prev_odm_pipe; odm_pipe = odm_pipe->prev_odm_pipe) in get_odm_config() 163 for (odm_pipe = odm_pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in get_odm_config() 174 struct pipe_ctx *odm_pipe; in dcn314_update_odm() local 203 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn314_update_odm() [all …]
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| /drivers/gpu/drm/amd/display/dc/link/ |
| A D | link_hwss_hpo_frl.c | 33 struct pipe_ctx *odm_pipe; in setup_hpo_frl_stream_attribute() local 37 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in setup_hpo_frl_stream_attribute()
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| A D | link_dpms.c | 810 struct pipe_ctx *odm_pipe; in link_set_dsc_on_stream() local 826 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in link_set_dsc_on_stream() 849 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in link_set_dsc_on_stream() 850 struct display_stream_compressor *odm_dsc = odm_pipe->stream_res.dsc; in link_set_dsc_on_stream() 855 odm_dsc->funcs->dsc_enable(odm_dsc, odm_pipe->stream_res.opp->inst); in link_set_dsc_on_stream() 907 for (odm_pipe = pipe_ctx; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in link_set_dsc_on_stream() 908 odm_pipe->stream_res.dsc->funcs->dsc_disconnect(odm_pipe->stream_res.dsc); in link_set_dsc_on_stream() 930 odm_pipe->stream_res.dsc->funcs->dsc_disable(odm_pipe->stream_res.dsc); in link_set_dsc_on_stream() 932 dccg->funcs->set_ref_dscclk(dccg, odm_pipe->stream_res.dsc->inst); in link_set_dsc_on_stream()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| A D | dcn32_hwseq.c | 1016 struct pipe_ctx *odm_pipe; in dcn32_update_dsc_on_stream() local 1032 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in dcn32_update_dsc_on_stream() 1069 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn32_update_dsc_on_stream() 1095 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn32_update_dsc_on_stream() 1097 odm_pipe->stream_res.dsc->funcs->dsc_disconnect(odm_pipe->stream_res.dsc); in dcn32_update_dsc_on_stream() 1109 struct pipe_ctx *odm_pipe; in get_odm_config() local 1112 for (odm_pipe = pipe_ctx; odm_pipe->prev_odm_pipe; odm_pipe = odm_pipe->prev_odm_pipe) in get_odm_config() 1120 for (odm_pipe = odm_pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in get_odm_config() 1148 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn32_update_odm() 1283 for (odm_pipe = pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn32_resync_fifo_dccg_dio() [all …]
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| A D | dcn35_hwseq.c | 321 struct pipe_ctx *odm_pipe; in update_dsc_on_stream() local 327 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in update_dsc_on_stream() 360 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in update_dsc_on_stream() 386 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in update_dsc_on_stream() 388 odm_pipe->stream_res.dsc->funcs->dsc_disable(odm_pipe->stream_res.dsc); in update_dsc_on_stream() 398 struct pipe_ctx *odm_pipe; in get_odm_config() local 401 for (odm_pipe = pipe_ctx; odm_pipe->prev_odm_pipe; odm_pipe = odm_pipe->prev_odm_pipe) in get_odm_config() 409 for (odm_pipe = odm_pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in get_odm_config() 420 struct pipe_ctx *odm_pipe; in dcn35_update_odm() local 449 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn35_update_odm() [all …]
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| /drivers/gpu/drm/amd/display/dc/link/accessories/ |
| A D | link_dp_cts.c | 480 struct pipe_ctx *odm_pipe; in set_crtc_test_pattern() local 513 odm_pipe = pipe_ctx; in set_crtc_test_pattern() 514 while (odm_pipe) { in set_crtc_test_pattern() 516 odm_opp = odm_pipe->stream_res.opp; in set_crtc_test_pattern() 519 odm_pipe, in set_crtc_test_pattern() 527 odm_pipe = odm_pipe->next_odm_pipe; in set_crtc_test_pattern() 545 odm_pipe = pipe_ctx; in set_crtc_test_pattern() 546 while (odm_pipe) { in set_crtc_test_pattern() 548 odm_opp = odm_pipe->stream_res.opp; in set_crtc_test_pattern() 551 odm_pipe, in set_crtc_test_pattern() [all …]
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| /drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.c | 1220 struct pipe_ctx *odm_pipe; in get_pixel_clock_parameters() local 1227 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in get_pixel_clock_parameters() 1652 struct pipe_ctx *odm_pipe; in dcn20_validate_dsc() local 1655 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in dcn20_validate_dsc() 1771 while (odm_pipe) { in dcn20_merge_pipes_for_validate() 1774 odm_pipe->plane_state = NULL; in dcn20_merge_pipes_for_validate() 1775 odm_pipe->stream = NULL; in dcn20_merge_pipes_for_validate() 1776 odm_pipe->top_pipe = NULL; in dcn20_merge_pipes_for_validate() 1783 memset(&odm_pipe->plane_res, 0, sizeof(odm_pipe->plane_res)); in dcn20_merge_pipes_for_validate() 1784 memset(&odm_pipe->stream_res, 0, sizeof(odm_pipe->stream_res)); in dcn20_merge_pipes_for_validate() [all …]
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| A D | dcn20_hwseq.c | 817 odm_pipe = odm_pipe->next_odm_pipe; in get_odm_segment_count() 1191 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn20_update_odm() 1237 odm_pipe = pipe_ctx; in dcn20_blank_pixel_data() 1242 odm_pipe, in dcn20_blank_pixel_data() 1250 odm_pipe = odm_pipe->next_odm_pipe; in dcn20_blank_pixel_data() 1255 odm_pipe, in dcn20_blank_pixel_data() 2613 while (odm_pipe) { in dcn20_disable_stream_gating() 2615 odm_pipe = odm_pipe->next_odm_pipe; in dcn20_disable_stream_gating() 2628 while (odm_pipe) { in dcn20_enable_stream_gating() 2630 odm_pipe = odm_pipe->next_odm_pipe; in dcn20_enable_stream_gating() [all …]
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| /drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| A D | dce110_hwseq.c | 1592 struct pipe_ctx *odm_pipe = pipe_ctx->next_odm_pipe; in dce110_apply_single_controller_ctx_to_hw() local 1638 while (odm_pipe) { in dce110_apply_single_controller_ctx_to_hw() 1639 odm_pipe->stream_res.opp->funcs->opp_set_dyn_expansion( in dce110_apply_single_controller_ctx_to_hw() 1640 odm_pipe->stream_res.opp, in dce110_apply_single_controller_ctx_to_hw() 1645 odm_pipe->stream_res.opp->funcs->opp_program_fmt( in dce110_apply_single_controller_ctx_to_hw() 1646 odm_pipe->stream_res.opp, in dce110_apply_single_controller_ctx_to_hw() 1649 odm_pipe = odm_pipe->next_odm_pipe; in dce110_apply_single_controller_ctx_to_hw()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc.c | 3600 struct pipe_ctx *odm_pipe = pipe_ctx->next_odm_pipe; in commit_planes_do_stream_update() local 3606 while (odm_pipe) { in commit_planes_do_stream_update() 3607 odm_pipe->stream_res.opp->funcs->opp_program_fmt(odm_pipe->stream_res.opp, in commit_planes_do_stream_update() 3610 odm_pipe = odm_pipe->next_odm_pipe; in commit_planes_do_stream_update() 4108 struct pipe_ctx *odm_pipe; in commit_planes_for_stream() local 4111 for (odm_pipe = mpcc_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in commit_planes_for_stream() 4112 odm_pipe->ttu_regs.min_ttu_vblank = MAX_TTU; in commit_planes_for_stream()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| A D | dcn401_hwseq.c | 1737 struct pipe_ctx *odm_pipe, *mpc_pipe; in dcn401_perform_3dlut_wa_unlock() local 1740 for (odm_pipe = pipe_ctx; odm_pipe != NULL; odm_pipe = odm_pipe->next_odm_pipe) { in dcn401_perform_3dlut_wa_unlock() 1741 for (mpc_pipe = odm_pipe; mpc_pipe != NULL; mpc_pipe = mpc_pipe->bottom_pipe) { in dcn401_perform_3dlut_wa_unlock()
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