| /drivers/comedi/drivers/ |
| A D | dt2817.c | 39 unsigned int oe = 0; in dt2817_dio_insn_config() local 57 oe |= 0x1; in dt2817_dio_insn_config() 59 oe |= 0x2; in dt2817_dio_insn_config() 61 oe |= 0x4; in dt2817_dio_insn_config() 63 oe |= 0x8; in dt2817_dio_insn_config() 65 outb(oe, dev->iobase + DT2817_CR); in dt2817_dio_insn_config()
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| /drivers/gpu/drm/bridge/ |
| A D | thc63lvd1024.c | 32 struct gpio_desc *oe; member 98 gpiod_set_value(thc63->oe, 1); in thc63_enable() 106 gpiod_set_value(thc63->oe, 0); in thc63_disable() 161 thc63->oe = devm_gpiod_get_optional(thc63->dev, "oe", GPIOD_OUT_LOW); in thc63_gpio_init() 162 if (IS_ERR(thc63->oe)) { in thc63_gpio_init() 164 PTR_ERR(thc63->oe)); in thc63_gpio_init() 165 return PTR_ERR(thc63->oe); in thc63_gpio_init()
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| /drivers/clk/ |
| A D | clk-si521xx.c | 44 #define SI521XX_OE_MAP_GET_OE(oe, map) (((map) >> (((oe) - 1) * 8)) & 0xff) argument 257 int oe, b, ctr = 0; in si521xx_diff_idx_to_reg_bit() local 259 for (oe = 1; oe <= 2; oe++) { in si521xx_diff_idx_to_reg_bit() 260 mask = bitrev8(SI521XX_OE_MAP_GET_OE(oe, chip_info)); in si521xx_diff_idx_to_reg_bit() 264 clk->reg = SI521XX_REG_OE(oe); in si521xx_diff_idx_to_reg_bit()
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| A D | clk-versaclock5.c | 945 unsigned int oe, sd, src_mask = 0, src_val = 0; in vc5_probe() local 984 "idt,output-enable-active", &oe); in vc5_probe() 987 if (oe) in vc5_probe()
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| /drivers/gpio/ |
| A D | gpio-tegra.c | 78 u32 oe[4]; member 214 u32 cnf, oe; in tegra_gpio_get_direction() local 220 oe = tegra_gpio_readl(tgi, GPIO_OE(tgi, offset)); in tegra_gpio_get_direction() 222 if (oe & pin_mask) in tegra_gpio_get_direction() 471 for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { in tegra_gpio_resume() 486 tegra_gpio_writel(tgi, bank->oe[p], in tegra_gpio_resume() 506 for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { in tegra_gpio_suspend() 513 bank->oe[p] = tegra_gpio_readl(tgi, in tegra_gpio_suspend()
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| A D | gpio-omap.c | 37 u32 oe; member 112 bank->context.oe = omap_gpio_rmw(bank->base + bank->regs->direction, in omap_set_gpio_direction() 1024 bank->context.oe = readl_relaxed(bank->base + bank->regs->direction); in omap_gpio_mod_init() 1100 p->context.oe = readl_relaxed(base + regs->direction); in omap_gpio_init_context() 1126 writel_relaxed(bank->context.oe, base + regs->direction); in omap_gpio_restore_context()
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| /drivers/pinctrl/ |
| A D | pinctrl-st.c | 233 struct regmap_field *alt, *oe, *pu, *od; member 248 const int alt, oe, pu, od, rt; member 350 .alt = 0, .oe = 40, .pu = 50, .od = 60, .rt = 100, 360 .oe = -1, /* Not Available */ 385 struct regmap_field *output_enable = pc->oe; in st_pinconf_set_config() 577 if (pc->oe) { in st_pinconf_get_direction() 578 regmap_field_read(pc->oe, &oe_value); in st_pinconf_get_direction() 996 int oe; in st_pinconf_dbg_show() local 1009 oe = st_gpio_get_direction(&pc_to_bank(pc)->gpio_chip, offset); in st_pinconf_dbg_show() 1013 (oe == GPIO_LINE_DIRECTION_OUT), in st_pinconf_dbg_show() [all …]
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| /drivers/media/i2c/ |
| A D | mt9v111.c | 151 struct gpio_desc *oe; member 373 gpiod_set_value(mt9v111->oe, 1); in __mt9v111_power_on() 383 gpiod_set_value(mt9v111->oe, 0); in __mt9v111_power_off() 1140 mt9v111->oe = devm_gpiod_get_optional(&client->dev, "enable", in mt9v111_probe() 1142 if (IS_ERR(mt9v111->oe)) { in mt9v111_probe() 1144 PTR_ERR(mt9v111->oe)); in mt9v111_probe() 1145 return PTR_ERR(mt9v111->oe); in mt9v111_probe()
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| A D | tvp5150.c | 88 u32 oe; member 898 decoder->lock ? decoder->oe : 0); in tvp5150_isr() 974 decoder->oe = TVP5150_MISC_CTL_YCBCR_OE | in tvp5150_enable() 979 decoder->oe = TVP5150_MISC_CTL_YCBCR_OE | in tvp5150_enable() 1461 val = decoder->lock ? decoder->oe : 0; in tvp5150_s_stream() 1463 val = decoder->oe; in tvp5150_s_stream()
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| /drivers/soc/mediatek/ |
| A D | mtk-svs.c | 1967 int adc_ge_t, adc_oe_t, ge, oe, gain, degc_cali, adc_cali_en_t; in svs_mt8183_efuse_parsing() local 2065 oe = (adc_oe_t - 512); in svs_mt8183_efuse_parsing() 2068 format[0] = (o_vtsmcu[0] + 3350 - oe); in svs_mt8183_efuse_parsing() 2069 format[1] = (o_vtsmcu[1] + 3350 - oe); in svs_mt8183_efuse_parsing() 2070 format[2] = (o_vtsmcu[2] + 3350 - oe); in svs_mt8183_efuse_parsing() 2071 format[3] = (o_vtsmcu[3] + 3350 - oe); in svs_mt8183_efuse_parsing() 2072 format[4] = (o_vtsmcu[4] + 3350 - oe); in svs_mt8183_efuse_parsing() 2073 format[5] = (o_vtsabb + 3350 - oe); in svs_mt8183_efuse_parsing() 2106 oe + tb_roomt * 10) * 15 / 18; in svs_mt8183_efuse_parsing()
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| /drivers/pinctrl/nuvoton/ |
| A D | pinctrl-npcm7xx.c | 1692 u32 ie, oe, pu, pd; in npcm7xx_config_get() local 1711 oe = ioread32(bank->base + NPCM7XX_GP_N_OE) & pinmask; in npcm7xx_config_get() 1713 rc = (ie && !oe); in npcm7xx_config_get() 1715 rc = (!ie && oe); in npcm7xx_config_get()
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| A D | pinctrl-npcm8xx.c | 2177 u32 ie, oe, pu, pd; in npcm8xx_config_get() local 2196 oe = ioread32(bank->base + NPCM8XX_GP_N_OE) & pinmask; in npcm8xx_config_get() 2198 rc = (ie && !oe); in npcm8xx_config_get() 2200 rc = (!ie && oe); in npcm8xx_config_get()
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| /drivers/ata/ |
| A D | pata_octeon_cf.c | 197 reg_tim.s.oe = t2; in octeon_cf_set_piomode()
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