| /drivers/clocksource/ |
| A D | timer-cadence-ttc.c | 251 if (ndata->new_rate > ndata->old_rate) { in ttc_rate_change_clocksource_cb()
253 ndata->old_rate); in ttc_rate_change_clocksource_cb()
254 rate_low = ndata->old_rate; in ttc_rate_change_clocksource_cb()
257 factor = DIV_ROUND_CLOSEST(ndata->old_rate, in ttc_rate_change_clocksource_cb()
260 rate_high = ndata->old_rate; in ttc_rate_change_clocksource_cb()
282 if (ndata->new_rate < ndata->old_rate) in ttc_rate_change_clocksource_cb()
297 if (ndata->new_rate < ndata->old_rate) in ttc_rate_change_clocksource_cb()
307 if (ndata->new_rate > ndata->old_rate) in ttc_rate_change_clocksource_cb()
317 if (ndata->new_rate < ndata->old_rate) in ttc_rate_change_clocksource_cb()
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| A D | arm_global_timer.c | 310 if (ndata->new_rate < ndata->old_rate) in gt_clk_rate_change_cb()
319 if (ndata->new_rate > ndata->old_rate) in gt_clk_rate_change_cb()
328 if (ndata->new_rate < ndata->old_rate) in gt_clk_rate_change_cb()
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| /drivers/clk/samsung/ |
| A D | clk-cpu.c | 236 if (alt_prate > ndata->old_rate || ndata->old_rate > ndata->new_rate) { in exynos_cpuclk_pre_rate_change()
237 unsigned long tmp_rate = min(ndata->old_rate, ndata->new_rate); in exynos_cpuclk_pre_rate_change()
357 if (alt_prate > ndata->old_rate || ndata->old_rate > ndata->new_rate) { in exynos5433_cpuclk_pre_rate_change()
358 unsigned long tmp_rate = min(ndata->old_rate, ndata->new_rate); in exynos5433_cpuclk_pre_rate_change()
491 if (ndata->new_rate == E850_OSCCLK || ndata->old_rate == E850_OSCCLK) in exynos850_cpuclk_pre_rate_change()
509 if (alt_prate > ndata->old_rate || ndata->old_rate > ndata->new_rate) { in exynos850_cpuclk_pre_rate_change()
510 unsigned long tmp_rate = min(ndata->old_rate, ndata->new_rate); in exynos850_cpuclk_pre_rate_change()
551 if (ndata->new_rate == E850_OSCCLK || ndata->old_rate == E850_OSCCLK) in exynos850_cpuclk_post_rate_change()
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| /drivers/clk/rockchip/ |
| A D | clk-cpu.c | 179 if (alt_prate > ndata->old_rate) { in rockchip_cpuclk_pre_rate_change()
181 alt_div = DIV_ROUND_UP(alt_prate, ndata->old_rate) - 1; in rockchip_cpuclk_pre_rate_change()
196 __func__, alt_div, alt_prate, ndata->old_rate); in rockchip_cpuclk_pre_rate_change()
240 if (ndata->old_rate < ndata->new_rate) in rockchip_cpuclk_post_rate_change()
270 if (ndata->old_rate > ndata->new_rate) in rockchip_cpuclk_post_rate_change()
291 __func__, event, ndata->old_rate, ndata->new_rate); in rockchip_cpuclk_notifier_cb()
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| A D | clk-mmc-phase.c | 189 if (ndata->old_rate <= ndata->new_rate) in rockchip_mmc_clk_rate_notify()
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| A D | clk.c | 151 __func__, event, ndata->old_rate, ndata->new_rate); in rockchip_clk_frac_notifier_cb()
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| /drivers/clk/tegra/ |
| A D | clk-device.c | 74 if (cnd->new_rate > cnd->old_rate) in tegra_clock_change_notify()
79 err = tegra_clock_set_pd_state(clk_dev, cnd->old_rate); in tegra_clock_change_notify()
83 if (cnd->new_rate < cnd->old_rate) in tegra_clock_change_notify()
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| /drivers/cpufreq/ |
| A D | highbank-cpufreq.c | 40 if (clk_data->new_rate > clk_data->old_rate) in hb_cpufreq_clk_notify()
45 if (clk_data->new_rate < clk_data->old_rate) in hb_cpufreq_clk_notify()
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| /drivers/clk/meson/ |
| A D | clk-pll.c | 424 unsigned long old_rate; in meson_clk_pll_set_rate() local
430 old_rate = clk_hw_get_rate(hw); in meson_clk_pll_set_rate()
455 __func__, clk_hw_get_name(hw), old_rate); in meson_clk_pll_set_rate()
462 meson_clk_pll_set_rate(hw, old_rate, parent_rate); in meson_clk_pll_set_rate()
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| /drivers/clk/qcom/ |
| A D | clk-cbf-8996.c | 184 if (cnd->old_rate > DIV_THRESHOLD && in cbf_clk_notifier_cb()
191 cnd->old_rate > DIV_THRESHOLD) in cbf_clk_notifier_cb()
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| A D | clk-cpu-8996.c | 565 cnd->old_rate > DIV_2_THRESHOLD) in cpu_clk_notifier_cb()
572 cnd->old_rate > DIV_2_THRESHOLD) in cpu_clk_notifier_cb()
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| /drivers/i2c/busses/ |
| A D | i2c-rk3x.c | 945 if (ndata->new_rate > ndata->old_rate) in rk3x_i2c_clk_notifier_cb()
951 if (ndata->new_rate < ndata->old_rate) in rk3x_i2c_clk_notifier_cb()
956 if (ndata->new_rate > ndata->old_rate) in rk3x_i2c_clk_notifier_cb()
957 rk3x_i2c_adapt_div(i2c, ndata->old_rate); in rk3x_i2c_clk_notifier_cb()
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| A D | i2c-cadence.c | 1383 if (ndata->new_rate > ndata->old_rate) in cdns_i2c_clk_notifier_cb()
1391 if (ndata->new_rate < ndata->old_rate) in cdns_i2c_clk_notifier_cb()
1396 if (ndata->new_rate > ndata->old_rate) in cdns_i2c_clk_notifier_cb()
1397 cdns_i2c_setclk(ndata->old_rate, id); in cdns_i2c_clk_notifier_cb()
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| /drivers/clk/ |
| A D | clk.c | 1853 unsigned long old_rate, unsigned long new_rate) in __clk_notify() argument
1859 cnd.old_rate = old_rate; in __clk_notify()
1964 unsigned long old_rate; in __clk_recalc_rates() local
1970 old_rate = core->rate; in __clk_recalc_rates()
1984 __clk_notify(core, msg, old_rate, core->rate); in __clk_recalc_rates()
2417 unsigned long old_rate; in clk_change_rate() local
2423 old_rate = core->rate; in clk_change_rate()
2478 if (core->notifier_count && old_rate != core->rate) in clk_change_rate()
2479 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); in clk_change_rate()
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| A D | clk_test.c | 2340 unsigned long old_rate; member
2364 ctx->pre_rate_change.old_rate = clk_data->old_rate; in clk_mux_notifier_callback()
2371 ctx->post_rate_change.old_rate = clk_data->old_rate; in clk_mux_notifier_callback()
2460 KUNIT_EXPECT_EQ(test, ctx->pre_rate_change.old_rate, DUMMY_CLOCK_RATE_1); in clk_mux_notifier_set_parent_test()
2468 KUNIT_EXPECT_EQ(test, ctx->post_rate_change.old_rate, DUMMY_CLOCK_RATE_1); in clk_mux_notifier_set_parent_test()
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| /drivers/hsi/controllers/ |
| A D | omap_ssi_core.c | 295 clk_data->old_rate, clk_data->new_rate); in ssi_clk_event()
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| /drivers/net/ethernet/ti/ |
| A D | davinci_cpdma.c | 411 u32 old_rate = ch->rate; in cpdma_chan_fit_rate() local
439 ch->rate = old_rate; in cpdma_chan_fit_rate()
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| /drivers/clk/at91/ |
| A D | clk-master.c | 286 cnd->old_rate * characteristics->divisors[div], in clk_master_div_notifier_fn()
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| /drivers/media/rc/img-ir/ |
| A D | img-ir-hw.c | 906 change->old_rate, change->new_rate); in img_ir_change_frequency()
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| /drivers/memory/tegra/ |
| A D | tegra20-emc.c | 337 err = emc_prepare_timing_change(emc, cnd->old_rate); in tegra_emc_clk_change_notify()
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| A D | tegra30-emc.c | 874 err = emc_unprepare_timing_change(emc, cnd->old_rate); in emc_clk_change_notify()
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| /drivers/gpu/drm/i915/gvt/ |
| A D | handlers.c | 695 u32 *old_rate = &(intel_vgpu_port(vgpu, vgpu->display.port_num)->vrefresh_k); in vgpu_update_refresh_rate() local
704 if (*old_rate != new_rate) in vgpu_update_refresh_rate()
705 *old_rate = new_rate; in vgpu_update_refresh_rate()
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