| /drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_resource.c | 2041 otg_master = otg_master->prev_odm_pipe; in resource_get_otg_master()
2042 return otg_master; in resource_get_otg_master()
2138 if (!otg_master || !otg_master->stream) in resource_get_odm_slice_dst_width()
2146 otg_master->hblank_borrow; in resource_get_odm_slice_dst_width()
2407 struct pipe_ctx *otg_master; in resource_log_pipe_topology_update() local
2420 if (!otg_master) in resource_log_pipe_topology_update()
2435 if (!otg_master) in resource_log_pipe_topology_update()
2850 if (!otg_master) in resource_remove_otg_master_for_stream_output()
2889 memset(otg_master, 0, sizeof(*otg_master)); in resource_remove_otg_master_for_stream_output()
3347 if (!otg_master) in resource_update_pipes_for_stream_with_slice_count()
[all …]
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| A D | dc_hw_sequencer.c | 1168 struct pipe_ctx *otg_master; in hwss_wait_for_odm_update_pending_complete() local
1173 otg_master = &context->res_ctx.pipe_ctx[i]; in hwss_wait_for_odm_update_pending_complete()
1174 if (!resource_is_pipe_type(otg_master, OTG_MASTER) || in hwss_wait_for_odm_update_pending_complete()
1175 dc_state_get_pipe_subvp_type(context, otg_master) == SUBVP_PHANTOM) in hwss_wait_for_odm_update_pending_complete()
1177 tg = otg_master->stream_res.tg; in hwss_wait_for_odm_update_pending_complete()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| A D | dcn401_hwseq.h | 84 struct pipe_ctx *otg_master);
86 …ffer_update_under_otg_master(struct dc *dc, struct dc_state *context, struct pipe_ctx *otg_master);
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| A D | dcn401_hwseq.c | 1510 struct pipe_ctx *otg_master) in update_dsc_for_odm_change() argument
1534 if (otg_master->stream_res.dsc) in update_dsc_for_odm_change()
1535 dcn32_update_dsc_on_stream(otg_master, in update_dsc_for_odm_change()
1536 otg_master->stream->timing.flags.DSC); in update_dsc_for_odm_change()
1549 struct pipe_ctx *otg_master) in dcn401_update_odm() argument
1559 otg_master, &context->res_ctx, opp_heads); in dcn401_update_odm()
1565 otg_master->stream_res.tg, in dcn401_update_odm()
1570 otg_master->stream_res.tg, in dcn401_update_odm()
1571 &otg_master->stream->timing); in dcn401_update_odm()
1585 if (!resource_is_pipe_type(otg_master, DPP_PIPE)) in dcn401_update_odm()
[all …]
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| A D | resource.h | 387 int resource_get_opp_heads_for_otg_master(const struct pipe_ctx *otg_master,
461 int resource_get_odm_slice_dst_width(struct pipe_ctx *otg_master,
653 int resource_calculate_det_for_stream(struct dc_state *state, struct pipe_ctx *otg_master);
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| A D | core_types.h | 149 const struct pipe_ctx *otg_master);
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| A D | dcn401_clk_mgr.c | 530 struct pipe_ctx *otg_master; in dcn401_update_clocks_update_dtb_dto() local
535 otg_master = resource_get_otg_master_for_stream( in dcn401_update_clocks_update_dtb_dto()
537 ASSERT(otg_master); in dcn401_update_clocks_update_dtb_dto()
538 ASSERT(otg_master->clock_source); in dcn401_update_clocks_update_dtb_dto()
539 ASSERT(otg_master->clock_source->funcs->program_pix_clk); in dcn401_update_clocks_update_dtb_dto()
542 use_hpo_encoder = dccg->ctx->dc->link_srv->dp_is_128b_132b_signal(otg_master); in dcn401_update_clocks_update_dtb_dto()
547 otg_master->clock_source->funcs->program_pix_clk( in dcn401_update_clocks_update_dtb_dto()
548 otg_master->clock_source, in dcn401_update_clocks_update_dtb_dto()
549 &otg_master->stream_res.pix_clk_params, in dcn401_update_clocks_update_dtb_dto()
551 &otg_master->link_config.dp_link_settings), in dcn401_update_clocks_update_dtb_dto()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | dml2_wrapper.h | 75 void (*build_test_pattern_params)(struct resource_context *res_ctx, struct pipe_ctx *otg_master);
98 int (*get_opp_heads_for_otg_master)(const struct pipe_ctx *otg_master,
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| A D | dml2_dc_resource_mgmt.c | 901 …struct pipe_ctx *otg_master = ctx->config.callbacks.get_otg_master_for_stream(&state->res_ctx, str… in get_source_odm_factor() local
903 if (!otg_master) in get_source_odm_factor()
906 return ctx->config.callbacks.get_odm_slice_count(otg_master); in get_source_odm_factor()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.c | 2835 const struct pipe_ctx *otg_master) in dcn32_acquire_free_pipe_as_secondary_opp_head() argument
2839 pool, otg_master); in dcn32_acquire_free_pipe_as_secondary_opp_head()
2845 free_pipe->stream = otg_master->stream; in dcn32_acquire_free_pipe_as_secondary_opp_head()
2846 free_pipe->stream_res.tg = otg_master->stream_res.tg; in dcn32_acquire_free_pipe_as_secondary_opp_head()
2855 free_pipe->hblank_borrow = otg_master->hblank_borrow; in dcn32_acquire_free_pipe_as_secondary_opp_head()
2868 ASSERT(otg_master); in dcn32_acquire_free_pipe_as_secondary_opp_head()
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| A D | dcn32_resource.h | 156 const struct pipe_ctx *otg_master);
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| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | dcn32_fpu.c | 1172 struct pipe_ctx *otg_master; in init_pipe_slice_table_from_context() local
1181 otg_master = resource_get_otg_master_for_stream( in init_pipe_slice_table_from_context()
1183 if (!otg_master) in init_pipe_slice_table_from_context()
1186 count = resource_get_odm_slice_count(otg_master); in init_pipe_slice_table_from_context()
1189 count = resource_get_dpp_pipes_for_opp_head(otg_master, in init_pipe_slice_table_from_context()
2128 struct pipe_ctx *otg_master = resource_get_otg_master_for_stream(&context->res_ctx, in dcn32_apply_merge_split_flags_helper() local
2131 if (otg_master) in dcn32_apply_merge_split_flags_helper()
2132 resource_build_test_pattern_params(&context->res_ctx, otg_master); in dcn32_apply_merge_split_flags_helper()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.c | 2152 struct pipe_ctx *otg_master = resource_get_otg_master_for_stream(res_ctx, opp_head->stream); in dcn20_acquire_free_pipe_for_layer() local
2153 …struct pipe_ctx *sec_dpp_pipe = resource_find_free_secondary_pipe_legacy(res_ctx, pool, otg_master… in dcn20_acquire_free_pipe_for_layer()
2155 ASSERT(otg_master); in dcn20_acquire_free_pipe_for_layer()
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