Home
last modified time | relevance | path

Searched refs:out_format (Results 1 – 21 of 21) sorted by relevance

/drivers/media/platform/amphion/
A Dvpu_dbg.c92 inst->out_format.pixfmt, in vpu_dbg_instance()
93 inst->out_format.pixfmt >> 8, in vpu_dbg_instance()
94 inst->out_format.pixfmt >> 16, in vpu_dbg_instance()
95 inst->out_format.pixfmt >> 24, in vpu_dbg_instance()
96 inst->out_format.width, in vpu_dbg_instance()
97 inst->out_format.height, in vpu_dbg_instance()
101 for (i = 0; i < inst->out_format.mem_planes; i++) { in vpu_dbg_instance()
103 vpu_get_fmt_plane_size(&inst->out_format, i), in vpu_dbg_instance()
104 inst->out_format.bytesperline[i]); in vpu_dbg_instance()
A Dvpu_malone.c1305 scode->inst->out_format.width, in vpu_malone_insert_scode_seq()
1306 scode->inst->out_format.height); in vpu_malone_insert_scode_seq()
1325 scode->inst->out_format.width, in vpu_malone_insert_scode_pic()
1326 scode->inst->out_format.height); in vpu_malone_insert_scode_pic()
1389 scode->inst->out_format.width, in vpu_malone_insert_scode_vc1_l_seq()
1390 scode->inst->out_format.height); in vpu_malone_insert_scode_vc1_l_seq()
1437 scode->inst->out_format.width, in vpu_malone_insert_scode_vp8_seq()
1438 scode->inst->out_format.height); in vpu_malone_insert_scode_vp8_seq()
1528 handler = get_scode_handler(scode->inst->out_format.pixfmt); in vpu_malone_insert_scode()
1603 inst->out_format.pixfmt, in vpu_malone_input_frame_data()
A Dvpu_v4l2.h41 return &inst->out_format; in vpu_get_format()
A Dvpu.h261 struct vpu_format out_format; member
A Dvenc.c344 s->r.width = inst->out_format.width; in venc_g_selection()
345 s->r.height = inst->out_format.height; in venc_g_selection()
791 src_buf = vpu_find_buf_by_sequence(inst, inst->out_format.type, frame->info.frame_id); in venc_get_one_encoded_frame()
A Dvpu_v4l2.c295 if (!vpu_check_ready(inst, inst->out_format.type)) in vpu_process_output_buffer()
668 inst->out_format.type = src_vq->type; in vpu_m2m_queue_init()
A Dvpu_msgs.c108 info.type = inst->out_format.type; in vpu_session_handle_frame_release()
A Dvpu_rpc.h434 inst->out_format.pixfmt, in vpu_iface_add_scode()
A Dvdec.c1007 inst->out_format.width = vdec->codec_info.width; in vdec_init_fmt()
1008 inst->out_format.height = vdec->codec_info.height; in vdec_init_fmt()
1313 switch (inst->out_format.pixfmt) { in vdec_update_v4l2_profile_level()
/drivers/gpu/drm/kmb/
A Dkmb_plane.c355 unsigned int ctrl = 0, val = 0, out_format = 0; in kmb_plane_atomic_update() local
515 out_format |= LCD_OUTF_FORMAT_RGB888; in kmb_plane_atomic_update()
519 out_format |= LCD_OUTF_MIPI_RGB_MODE; in kmb_plane_atomic_update()
520 kmb_write_lcd(kmb, LCD_OUT_FORMAT_CFG, out_format); in kmb_plane_atomic_update()
/drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/
A Ddcn20_mmhubbub.c274 enum dwb_scaler_mode out_format, in mcifwb2_dump_frame() argument
292 dump_info->format = out_format; in mcifwb2_dump_frame()
A Ddcn20_mmhubbub.h501 enum dwb_scaler_mode out_format,
/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dmcif_wb.h99 enum dwb_scaler_mode out_format,
/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_dwb.c256 REG_UPDATE_2(WBSCL_MODE, WBSCL_MODE, params->out_format, in dwb2_set_scaler()
259 if (params->out_format != dwb_scaler_mode_bypass444) { in dwb2_set_scaler()
/drivers/media/i2c/
A Dgc0308.c421 u8 out_format; member
1069 gc0308->mode.out_format = gc0308_formats[i].regval; in gc0308_set_format()
1133 GENMASK(4, 0), gc0308->mode.out_format, &ret); in gc0308_start_stream()
A Dds90ub913.c326 static const struct v4l2_mbus_framefmt out_format = { in _ub913_set_routing() local
355 stream_configs->configs[i].fmt = out_format; in _ub913_set_routing()
/drivers/gpu/drm/amd/display/dc/
A Ddc_types.h427 enum dwb_scaler_mode out_format; /* default = YUV420 - TODO: limit this to 0 and 1 on dcn3 */ member
/drivers/media/platform/samsung/exynos4-is/
A Dfimc-is-param.h628 u32 out_format; member
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddcn20_fpu.c1017 if (wb_info->dwb_params.out_format == dwb_scaler_mode_yuv420) { in dcn20_populate_dml_writeback_from_context()
2525 if (wb_info->dwb_params.out_format == dwb_scaler_mode_yuv420) { in dcn201_populate_dml_writeback_from_context_fpu()
/drivers/gpu/drm/amd/display/dc/resource/dcn20/
A Ddcn20_resource.c1617 …if (context->res_ctx.pipe_ctx[i].stream->writeback_info[j].dwb_params.out_format == dwb_scaler_mod… in dcn20_set_mcif_arb_params()
/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm.c10055 wb_info->dwb_params.out_format = dwb_scaler_mode_bypass444; in dm_set_writeback()

Completed in 881 milliseconds