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Searched refs:outbox0 (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/amd/display/dmub/src/
A Ddmub_dcn20.c332 const struct dmub_region *outbox0) in dmub_dcn20_setup_outbox0() argument
334 REG_WRITE(DMCUB_OUTBOX0_BASE_ADDRESS, outbox0->base); in dmub_dcn20_setup_outbox0()
336 REG_WRITE(DMCUB_OUTBOX0_SIZE, outbox0->top - outbox0->base); in dmub_dcn20_setup_outbox0()
A Ddmub_dcn31.c395 const struct dmub_region *outbox0) in dmub_dcn31_setup_outbox0() argument
397 REG_WRITE(DMCUB_OUTBOX0_BASE_ADDRESS, outbox0->base); in dmub_dcn31_setup_outbox0()
399 REG_WRITE(DMCUB_OUTBOX0_SIZE, outbox0->top - outbox0->base); in dmub_dcn31_setup_outbox0()
A Ddmub_dcn35.c433 const struct dmub_region *outbox0) in dmub_dcn35_setup_outbox0() argument
435 REG_WRITE(DMCUB_OUTBOX0_BASE_ADDRESS, outbox0->base); in dmub_dcn35_setup_outbox0()
437 REG_WRITE(DMCUB_OUTBOX0_SIZE, outbox0->top - outbox0->base); in dmub_dcn35_setup_outbox0()
A Ddmub_dcn32.c398 const struct dmub_region *outbox0) in dmub_dcn32_setup_outbox0() argument
400 REG_WRITE(DMCUB_OUTBOX0_BASE_ADDRESS, outbox0->base); in dmub_dcn32_setup_outbox0()
402 REG_WRITE(DMCUB_OUTBOX0_SIZE, outbox0->top - outbox0->base); in dmub_dcn32_setup_outbox0()
A Ddmub_dcn401.c392 const struct dmub_region *outbox0) in dmub_dcn401_setup_outbox0() argument
394 REG_WRITE(DMCUB_OUTBOX0_BASE_ADDRESS, outbox0->base); in dmub_dcn401_setup_outbox0()
396 REG_WRITE(DMCUB_OUTBOX0_SIZE, outbox0->top - outbox0->base); in dmub_dcn401_setup_outbox0()
A Ddmub_srv.c661 struct dmub_region inbox1, outbox1, outbox0; in dmub_srv_hw_init() local
736 outbox0.base = DMUB_REGION5_BASE + TRACE_BUFFER_ENTRY_OFFSET; in dmub_srv_hw_init()
737 outbox0.top = outbox0.base + tracebuff_fb->size - TRACE_BUFFER_ENTRY_OFFSET; in dmub_srv_hw_init()
759 dmub->hw_funcs.setup_outbox0(dmub, &outbox0); in dmub_srv_hw_init()
A Ddmub_dcn20.h220 const struct dmub_region *outbox0);
A Ddmub_dcn31.h246 const struct dmub_region *outbox0);
A Ddmub_dcn32.h249 const struct dmub_region *outbox0);
A Ddmub_dcn35.h264 const struct dmub_region *outbox0);
A Ddmub_dcn401.h259 const struct dmub_region *outbox0);
/drivers/gpu/drm/amd/display/dmub/
A Ddmub_srv.h443 const struct dmub_region *outbox0);

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