| /drivers/gpu/drm/nouveau/dispnv04/ |
| A D | dfp.c | 298 drm_mode_debug_printmodeline(output_mode); in nv04_dfp_mode_set() 304 (output_mode->hsync_start - output_mode->hdisplay) >= in nv04_dfp_mode_set() 306 regp->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay; in nv04_dfp_mode_set() 315 regp->fp_vert_regs[FP_TOTAL] = output_mode->vtotal - 1; in nv04_dfp_mode_set() 327 if (output_mode->flags & DRM_MODE_FLAG_PVSYNC) in nv04_dfp_mode_set() 329 if (output_mode->flags & DRM_MODE_FLAG_PHSYNC) in nv04_dfp_mode_set() 343 output_mode->clock > 165000) in nv04_dfp_mode_set() 358 if (output_mode->clock > 165000) in nv04_dfp_mode_set() 376 panel_ratio = (1 << 12) * output_mode->hdisplay / output_mode->vdisplay; in nv04_dfp_mode_set() 394 diff = output_mode->hdisplay - in nv04_dfp_mode_set() [all …]
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| A D | tvnv17.c | 270 (output_mode->flags & in nv17_tv_get_hd_modes() 277 if (output_mode->hdisplay <= 720 in nv17_tv_get_hd_modes() 278 || output_mode->hdisplay >= 1920) { in nv17_tv_get_hd_modes() 279 mode->htotal = output_mode->htotal; in nv17_tv_get_hd_modes() 285 if (output_mode->vdisplay >= 1024) { in nv17_tv_get_hd_modes() 286 mode->vtotal = output_mode->vtotal; in nv17_tv_get_hd_modes() 288 mode->vsync_end = output_mode->vsync_end; in nv17_tv_get_hd_modes() 316 struct drm_display_mode *output_mode = in nv17_tv_mode_valid() local 526 struct drm_display_mode *output_mode = in nv17_tv_mode_set() local 543 output_mode->hsync_start - 1; in nv17_tv_mode_set() [all …]
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| A D | tvmodesnv17.c | 548 struct drm_display_mode *output_mode = in nv17_ctv_update_rescaler() local 553 if (output_mode->flags & DRM_MODE_FLAG_INTERLACE) in nv17_ctv_update_rescaler() 558 hmargin = (output_mode->hdisplay - crtc_mode->hdisplay) / 2; in nv17_ctv_update_rescaler() 559 vmargin = (output_mode->vdisplay - crtc_mode->vdisplay) / 2; in nv17_ctv_update_rescaler() 561 hmargin = interpolate(0, min(hmargin, output_mode->hdisplay/20), in nv17_ctv_update_rescaler() 563 vmargin = interpolate(0, min(vmargin, output_mode->vdisplay/20), in nv17_ctv_update_rescaler() 567 (output_mode->hdisplay - 2*hmargin); in nv17_ctv_update_rescaler() 569 (output_mode->vdisplay - 2*vmargin) & ~3; in nv17_ctv_update_rescaler() 572 regs->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - hmargin - 1; in nv17_ctv_update_rescaler() 574 regs->fp_vert_regs[FP_VALID_END] = output_mode->vdisplay - vmargin - 1; in nv17_ctv_update_rescaler()
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| /drivers/media/usb/cx231xx/ |
| A D | cx231xx-cards.c | 89 .output_mode = OUT_MODE_VIP11, 129 .output_mode = OUT_MODE_VIP11, 169 .output_mode = OUT_MODE_VIP11, 210 .output_mode = OUT_MODE_VIP11, 245 .output_mode = OUT_MODE_VIP11, 281 .output_mode = OUT_MODE_VIP11, 309 .output_mode = OUT_MODE_VIP11, 337 .output_mode = OUT_MODE_VIP11, 371 .output_mode = OUT_MODE_VIP11, 398 .output_mode = OUT_MODE_VIP11, [all …]
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| /drivers/gpu/drm/rockchip/ |
| A D | rockchip_rgb.c | 30 int output_mode; member 50 s->output_mode = ROCKCHIP_OUT_MODE_P666; in rockchip_rgb_encoder_atomic_check() 53 s->output_mode = ROCKCHIP_OUT_MODE_P565; in rockchip_rgb_encoder_atomic_check() 58 s->output_mode = ROCKCHIP_OUT_MODE_P888; in rockchip_rgb_encoder_atomic_check()
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| A D | dw-mipi-dsi2-rockchip.c | 253 s->output_mode = ROCKCHIP_OUT_MODE_P666; in dw_mipi_dsi2_encoder_atomic_check() 256 s->output_mode = ROCKCHIP_OUT_MODE_P565; in dw_mipi_dsi2_encoder_atomic_check() 259 s->output_mode = ROCKCHIP_OUT_MODE_P888; in dw_mipi_dsi2_encoder_atomic_check()
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| A D | rockchip_drm_drv.h | 48 int output_mode; member
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| /drivers/gpu/drm/atmel-hlcdc/ |
| A D | atmel_hlcdc_crtc.c | 37 unsigned int output_mode; member 167 cfg = state->output_mode << 8; in atmel_hlcdc_crtc_mode_set_nofb() 446 hstate->output_mode = fls(output_fmts) - 1; in atmel_hlcdc_crtc_select_output_mode() 450 hstate->output_mode -= 4; in atmel_hlcdc_crtc_select_output_mode() 570 state->output_mode = cur->output_mode; in atmel_hlcdc_crtc_duplicate_state()
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| /drivers/iio/dac/ |
| A D | ad5770r.c | 137 struct ad5770r_out_range output_mode[AD5770R_MAX_CHANNELS]; member 254 out_range = st->output_mode[ch].out_range_mode; in ad5770r_get_range() 420 st->output_mode[index].out_range_mode = ad5770r_rng_tbl[i].mode; in ad5770r_store_output_range() 457 st->output_mode[0].out_range_mode > AD5770R_CH0_0_300) { in ad5770r_write_dac_powerdown() 565 ret = ad5770r_set_output_mode(st, &st->output_mode[i], i); in ad5770r_init()
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| /drivers/media/pci/ivtv/ |
| A D | ivtv-streams.c | 505 if (itv->output_mode == OUT_PASSTHROUGH) { in ivtv_start_v4l2_encode_stream() 516 if (itv->output_mode == OUT_PASSTHROUGH) { in ivtv_start_v4l2_encode_stream() 695 if (itv->output_mode == OUT_PASSTHROUGH) { in ivtv_setup_v4l2_decode_stream() 994 if (itv->output_mode == OUT_PASSTHROUGH) { in ivtv_passthrough_mode() 1023 if (itv->output_mode != OUT_PASSTHROUGH) in ivtv_passthrough_mode() 1034 itv->output_mode = OUT_NONE; in ivtv_passthrough_mode()
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| /drivers/gpu/drm/nouveau/dispnv50/ |
| A D | atom.h | 63 u8 output_mode:2; member 203 u8 output_mode:2; member
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| A D | wndwc57e.c | 137 NVVAL(NVC57E, SET_ILUT_CONTROL, INTERPOLATE, asyw->xlut.i.output_mode), in wndwc57e_ilut_set() 192 asyw->xlut.i.output_mode = NVC57E_SET_ILUT_CONTROL_INTERPOLATE_DISABLE; in wndwc57e_ilut()
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| A D | headc57d.c | 121 NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, INTERPOLATE, asyh->olut.output_mode) | in headc57d_olut_set() 193 asyh->olut.output_mode = NVC57D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_ENABLE; in headc57d_olut()
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| /drivers/media/dvb-frontends/ |
| A D | cx22702.h | 28 u8 output_mode; member
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| A D | s5h1409.h | 22 u8 output_mode; member
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| A D | s5h1411.h | 23 u8 output_mode; member
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| A D | s5h1432.h | 27 u8 output_mode; member
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| A D | tda10048.h | 24 u8 output_mode; member
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| A D | tda1002x.h | 42 u8 output_mode; member
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| A D | dib7000p.h | 36 u8 output_mode; member
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| /drivers/dpll/zl3073x/ |
| A D | dpll.c | 957 u8 out, output_mode; in zl3073x_dpll_output_pin_esync_get() local 985 rc = zl3073x_read_u8(zldev, ZL_REG_OUTPUT_MODE, &output_mode); in zl3073x_dpll_output_pin_esync_get() 1007 clock_type = FIELD_GET(ZL_OUTPUT_MODE_CLOCK_TYPE, output_mode); in zl3073x_dpll_output_pin_esync_get() 1069 u8 clock_type, out, output_mode, synth; in zl3073x_dpll_output_pin_esync_set() local 1096 rc = zl3073x_read_u8(zldev, ZL_REG_OUTPUT_MODE, &output_mode); in zl3073x_dpll_output_pin_esync_set() 1107 output_mode &= ~ZL_OUTPUT_MODE_CLOCK_TYPE; in zl3073x_dpll_output_pin_esync_set() 1108 output_mode |= FIELD_PREP(ZL_OUTPUT_MODE_CLOCK_TYPE, clock_type); in zl3073x_dpll_output_pin_esync_set() 1109 rc = zl3073x_write_u8(zldev, ZL_REG_OUTPUT_MODE, output_mode); in zl3073x_dpll_output_pin_esync_set()
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| A D | core.c | 514 u8 output_ctrl, output_mode; in zl3073x_out_state_fetch() local 540 rc = zl3073x_read_u8(zldev, ZL_REG_OUTPUT_MODE, &output_mode); in zl3073x_out_state_fetch() 546 output_mode); in zl3073x_out_state_fetch()
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| /drivers/media/pci/cx23885/ |
| A D | cx23885-dvb.c | 179 .output_mode = S5H1409_SERIAL_OUTPUT, 189 .output_mode = TDA10048_SERIAL_OUTPUT, 211 .output_mode = S5H1409_SERIAL_OUTPUT, 221 .output_mode = S5H1409_SERIAL_OUTPUT, 231 .output_mode = S5H1409_SERIAL_OUTPUT, 249 .output_mode = S5H1409_SERIAL_OUTPUT, 259 .output_mode = S5H1409_SERIAL_OUTPUT, 268 .output_mode = S5H1411_SERIAL_OUTPUT, 278 .output_mode = S5H1411_SERIAL_OUTPUT, 445 .output_mode = OUTMODE_MPEG2_SERIAL, [all …]
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| /drivers/media/usb/pvrusb2/ |
| A D | pvrusb2-devattr.c | 300 .output_mode = TDA10048_PARALLEL_OUTPUT, 398 .output_mode = S5H1409_PARALLEL_OUTPUT, 406 .output_mode = S5H1411_PARALLEL_OUTPUT,
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| /drivers/media/pci/cx88/ |
| A D | cx88-dvb.c | 358 .output_mode = CX22702_SERIAL_OUTPUT, 363 .output_mode = CX22702_SERIAL_OUTPUT, 543 .output_mode = S5H1409_PARALLEL_OUTPUT, 553 .output_mode = S5H1409_SERIAL_OUTPUT, 562 .output_mode = S5H1409_SERIAL_OUTPUT, 587 .output_mode = S5H1411_SERIAL_OUTPUT,
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