Searched refs:output_width (Results 1 – 11 of 11) sorted by relevance
| /drivers/staging/media/ipu3/ |
| A D | ipu3-css-params.c | 54 if (input_width == output_width) { in imgu_css_scaler_setup_lut()
90 output_width / input_width; in imgu_css_scaler_setup_lut()
189 *output_width = out_width; in imgu_css_scaler_calc()
351 int output_width[IMGU_ABI_OSYS_PINS]; member
370 unsigned int output_width, pin, s; in imgu_css_osys_calc_frame_and_stripe_params() local
543 output_width = reso.input_width; in imgu_css_osys_calc_frame_and_stripe_params()
575 output_width * s / stripes; in imgu_css_osys_calc_frame_and_stripe_params()
787 stripe_params[s].output_width[i] = in imgu_css_osys_calc_frame_and_stripe_params()
795 stripe_params[s].output_width[i] = in imgu_css_osys_calc_frame_and_stripe_params()
1015 osys->stripe[s].output_width[pin] = in imgu_css_osys_calc()
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| A D | ipu3-abi.h | 1041 u32 output_width[IMGU_ABI_OSYS_PINS]; member
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| /drivers/gpu/drm/msm/disp/dpu1/ |
| A D | dpu_hw_cdm.h | 28 u32 output_width; member
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| A D | dpu_hw_cdm.c | 162 out_size = (cfg->output_width & 0xFFFF) | ((cfg->output_height & 0xFFFF) << 16); in dpu_hw_cdm_setup_cdwn()
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| A D | dpu_encoder.c | 2440 cdm_cfg->output_width = phys_enc->cached_mode.hdisplay; in dpu_encoder_helper_phys_setup_cdm()
2472 DRMID(phys_enc->parent), cdm_cfg->output_width, in dpu_encoder_helper_phys_setup_cdm()
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| /drivers/media/platform/verisilicon/ |
| A D | hantro_postproc.c | 47 .output_width = {G1_REG_PP_CONTROL, 4, 0x7ff},
104 HANTRO_PP_REG_WRITE(vpu, output_width, ctx->dst_fmt.width); in hantro_postproc_g1_enable()
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| A D | hantro.h | 320 struct hantro_reg output_width; member
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| /drivers/gpu/drm/arm/ |
| A D | malidp_drv.c | 712 u8 output_width[MAX_OUTPUT_CHANNELS]; in malidp_bind() local
803 output_width, MAX_OUTPUT_CHANNELS); in malidp_bind()
808 out_depth = (out_depth << 8) | (output_width[i] & 0xf); in malidp_bind()
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
| A D | dml_top_display_cfg_types.h | 294 unsigned long output_width; member
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| /drivers/media/platform/raspberrypi/rp1-cfe/ |
| A D | pisp-fe.c | 258 (cfg->ch[c].downscale.output_width < 2 || in pisp_fe_validate_output()
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| A D | dml2_core_dcn4_calcs.c | 6831 …ptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8086 …criptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width in dml_core_mode_support()
8092 …criptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width in dml_core_mode_support()
8563 …riptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width, in dml_core_mode_support()
9153 …riptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width, in dml_core_mode_support()
10951 …riptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width, in dml_core_mode_programming()
11898 * display_cfg->stream_descriptors[k].writeback.writeback_stream[0].output_width / in dml_core_mode_programming()
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