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/drivers/gpu/drm/omapdrm/
A Dtcm.h52 struct tcm_pt p0; member
228 slice->p0.y != slice->p1.y && in tcm_slice()
232 slice->p1.y = (slice->p0.x) ? slice->p0.y : slice->p1.y - 1; in tcm_slice()
234 parent->p0.x = 0; in tcm_slice()
235 parent->p0.y = slice->p1.y + 1; in tcm_slice()
249 area->p0.y <= area->p1.y && in tcm_area_is_valid()
253 area->p0.x + area->p0.y * area->tcm->width <= in tcm_area_is_valid()
257 area->p0.x <= area->p1.x)); in tcm_area_is_valid()
270 return i >= a->p0.x + a->p0.y * a->tcm->width && in __tcm_is_in()
292 (area->p1.x - area->p0.x + 1) + (area->p1.y - area->p0.y) * in __tcm_sizeof()
[all …]
A Dtcm-sita.c163 area->p0.x = pos % tcm->width; in sita_reserve_1d()
164 area->p0.y = pos / tcm->width; in sita_reserve_1d()
185 area->p0.x = pos % tcm->width; in sita_reserve_2d()
186 area->p0.y = pos / tcm->width; in sita_reserve_2d()
187 area->p1.x = area->p0.x + w - 1; in sita_reserve_2d()
188 area->p1.y = area->p0.y + h - 1; in sita_reserve_2d()
205 pos = area->p0.x + area->p0.y * tcm->width; in sita_free()
207 w = area->p1.x - area->p0.x + 1; in sita_free()
208 h = area->p1.y - area->p0.y + 1; in sita_free()
A Domap_dmm_tiler.c487 .x0 = slice.p0.x, .y0 = slice.p0.y, in fill()
672 block->area.p0.x * geom[block->fmt].slot_w, in tiler_ssptr()
679 struct tcm_pt *p = &block->area.p0; in tiler_tsptr()
1038 if (a->p0.y + 1 < a->p1.y) { in map_1d_info()
1041 } else if (a->p0.y < a->p1.y) { in map_1d_info()
1043 text_map(map, xdiv, nice, a->p0.y / ydiv, in map_1d_info()
1044 a->p0.x + xdiv, 256 - 1); in map_1d_info()
1049 text_map(map, xdiv, nice, a->p0.y / ydiv, a->p0.x, a->p1.x); in map_1d_info()
1059 a->p0.x, a->p1.x); in map_2d_info()
1117 ydiv, &block->area.p0) == ' '; in tiler_map_show()
[all …]
/drivers/scsi/qla4xxx/
A Dql4_dbg.c106 offsetof(struct isp_reg, u2.isp4022.p0.ext_hw_conf), in qla4xxx_dump_registers()
107 readw(&ha->reg->u2.isp4022.p0.ext_hw_conf)); in qla4xxx_dump_registers()
109 offsetof(struct isp_reg, u2.isp4022.p0.port_ctrl), in qla4xxx_dump_registers()
110 readw(&ha->reg->u2.isp4022.p0.port_ctrl)); in qla4xxx_dump_registers()
112 offsetof(struct isp_reg, u2.isp4022.p0.port_status), in qla4xxx_dump_registers()
113 readw(&ha->reg->u2.isp4022.p0.port_status)); in qla4xxx_dump_registers()
116 readw(&ha->reg->u2.isp4022.p0.gp_out)); in qla4xxx_dump_registers()
118 (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_in), in qla4xxx_dump_registers()
119 readw(&ha->reg->u2.isp4022.p0.gp_in)); in qla4xxx_dump_registers()
121 offsetof(struct isp_reg, u2.isp4022.p0.port_err_status), in qla4xxx_dump_registers()
[all …]
A Dql4_def.h944 &ha->reg->u2.isp4022.p0.ext_hw_conf); in isp_ext_hw_conf()
951 &ha->reg->u2.isp4022.p0.port_status); in isp_port_status()
958 &ha->reg->u2.isp4022.p0.port_ctrl); in isp_port_ctrl()
965 &ha->reg->u2.isp4022.p0.port_err_status); in isp_port_error_status()
972 &ha->reg->u2.isp4022.p0.gp_out); in isp_gp_out()
/drivers/media/usb/pwc/
A Dpwc-dec23.c93 unsigned char *p0, *p8; in build_table_color() local
98 p0 = p0004[compression_mode]; in build_table_color()
102 for (j = 0; j < 8; j++, r++, p0 += 128) { in build_table_color()
126 p0[k + 0x00] = (1 * pw) + 0x80; in build_table_color()
127 p0[k + 0x10] = (2 * pw) + 0x80; in build_table_color()
128 p0[k + 0x20] = (3 * pw) + 0x80; in build_table_color()
129 p0[k + 0x30] = (4 * pw) + 0x80; in build_table_color()
130 p0[k + 0x40] = (-1 * pw) + 0x80; in build_table_color()
131 p0[k + 0x50] = (-2 * pw) + 0x80; in build_table_color()
132 p0[k + 0x60] = (-3 * pw) + 0x80; in build_table_color()
[all …]
/drivers/input/touchscreen/
A Dmsg2638.c121 struct msg2138_packet *p0, *p1; in msg2138_ts_irq_handler() local
139 p0 = &touch_event.pkt[0]; in msg2138_ts_irq_handler()
143 if (p0->xy_hi == 0xFF && p0->x_low == 0xFF && p0->y_low == 0xFF) { in msg2138_ts_irq_handler()
149 x = ((p0->xy_hi & 0xF0) << 4) | p0->x_low; in msg2138_ts_irq_handler()
150 y = ((p0->xy_hi & 0x0F) << 8) | p0->y_low; in msg2138_ts_irq_handler()
/drivers/parisc/
A Deisa_enumerator.c324 int p0; in parse_slot_config() local
345 p0 = pos; in parse_slot_config()
350 pos = p0 + function_len; in parse_slot_config()
357 pos = p0 + function_len; in parse_slot_config()
395 if (p0 + function_len < pos) { in parse_slot_config()
398 num_func, pos-p0, function_len); in parse_slot_config()
402 pos = p0 + function_len; in parse_slot_config()
/drivers/gpu/drm/vc4/
A Dvc4_validate.c576 uint32_t p0 = *(uint32_t *)(uniform_data_u + sample->p_offset[0]); in reloc_tex() local
583 uint32_t offset = p0 & VC4_TEX_P0_OFFSET_MASK; in reloc_tex()
584 uint32_t miplevels = VC4_GET_FIELD(p0, VC4_TEX_P0_MIPLVLS); in reloc_tex()
597 uint32_t remaining_size = tex->base.size - p0; in reloc_tex()
599 if (p0 > tex->base.size - 4) { in reloc_tex()
608 *validated_p0 = tex->dma_addr + p0; in reloc_tex()
617 if (p0 & VC4_TEX_P0_CMMODE_MASK) { in reloc_tex()
636 type = (VC4_GET_FIELD(p0, VC4_TEX_P0_TYPE) | in reloc_tex()
736 *validated_p0 = tex->dma_addr + p0; in reloc_tex()
740 DRM_INFO("Texture p0 at %d: 0x%08x\n", sample->p_offset[0], p0); in reloc_tex()
/drivers/tty/vt/
A Dconmakehash.c31 static int getunicode(char **p0) in getunicode() argument
33 char *p = *p0; in getunicode()
41 *p0 = p+6; in getunicode()
/drivers/gpu/drm/i915/display/
A Dintel_dpll_mgr.c1566 *p0 = 3; in skl_wrpll_get_multipliers()
1570 *p0 = p; in skl_wrpll_get_multipliers()
1574 *p0 = 3; in skl_wrpll_get_multipliers()
1757 p0 = 1; in skl_ddi_wrpll_get_freq()
1760 p0 = 2; in skl_ddi_wrpll_get_freq()
1763 p0 = 3; in skl_ddi_wrpll_get_freq()
1773 p0 = 7; in skl_ddi_wrpll_get_freq()
2848 p0 = 2; in icl_ddi_combo_pll_get_freq()
2851 p0 = 3; in icl_ddi_combo_pll_get_freq()
2854 p0 = 5; in icl_ddi_combo_pll_get_freq()
[all …]
/drivers/video/fbdev/sis/
A Dsis_accel.h226 #define SiS300SetupMONOPAT(p0,p1) \ argument
228 MMIO_OUT32(ivideo->mmio_vbase, BR(11), p0);\
352 #define SiS310SetupMONOPAT(p0,p1) \ argument
354 MMIO_OUT32(ivideo->mmio_vbase, MONO_MASK, p0);\
/drivers/gpio/
A Dgpio-crystalcove.c281 unsigned int p0, p1; in crystalcove_gpio_irq_handler() local
285 if (regmap_read(cg->regmap, GPIO0IRQ, &p0) || in crystalcove_gpio_irq_handler()
289 regmap_write(cg->regmap, GPIO0IRQ, p0); in crystalcove_gpio_irq_handler()
292 pending = p0 | p1 << 8; in crystalcove_gpio_irq_handler()
/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/
A Ddml2_top_soc15.c598 params->mcache_allocations[plane_index].shift_granularity.p0, &p0shift); in dml2_top_mcache_validate_admissability()
633 per_plane_pipe_mcache_regs->main.p0.mcache_id_first = MCACHE_ID_UNASSIGNED; in reset_mcache_allocations()
634 per_plane_pipe_mcache_regs->main.p0.mcache_id_second = MCACHE_ID_UNASSIGNED; in reset_mcache_allocations()
635 per_plane_pipe_mcache_regs->main.p0.split_location = SPLIT_LOCATION_UNDEFINED; in reset_mcache_allocations()
637 per_plane_pipe_mcache_regs->mall.p0.mcache_id_first = MCACHE_ID_UNASSIGNED; in reset_mcache_allocations()
638 per_plane_pipe_mcache_regs->mall.p0.mcache_id_second = MCACHE_ID_UNASSIGNED; in reset_mcache_allocations()
639 per_plane_pipe_mcache_regs->mall.p0.split_location = SPLIT_LOCATION_UNDEFINED; in reset_mcache_allocations()
1047 params->per_plane_pipe_mcache_regs[config_index][pipe_index]->main.p0.mcache_id_first = in dml2_top_soc15_build_mcache_programming()
1050 params->per_plane_pipe_mcache_regs[config_index][pipe_index]->mall.p0.mcache_id_first = in dml2_top_soc15_build_mcache_programming()
1056 params->per_plane_pipe_mcache_regs[config_index][pipe_index]->main.p0.split_location = in dml2_top_soc15_build_mcache_programming()
[all …]
/drivers/net/wireless/ath/
A Ddfs_pri_detector.c102 struct pulse_elem *p, *p0; in pool_deregister_ref() local
104 list_for_each_entry_safe(p, p0, &pulse_pool, head) { in pool_deregister_ref()
361 struct pulse_elem *p, *p0; in pri_detector_reset() local
366 list_for_each_entry_safe(p, p0, &pde->pulses, head) { in pri_detector_reset()
/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
A Ddml_top_dchub_registers.h138 struct dml2_display_mcache_regs p0; member
142 struct dml2_display_mcache_regs p0; member
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
A Didle.fuc53 bset $flags $p0
82 sleep $p0
/drivers/tee/optee/
A Drpc.c375 void *p0, *p1; in handle_rpc_func_rpmb_frames() local
394 p0 = tee_shm_get_va(params[0].u.memref.shm, in handle_rpc_func_rpmb_frames()
398 if (rpmb_route_frames(rdev, p0, params[0].u.memref.size, p1, in handle_rpc_func_rpmb_frames()
/drivers/video/fbdev/
A Dcontrolfb.c384 unsigned long p0, p1, p2, k, l, m, n, min; in calc_clock_params() local
391 p0 = 0; in calc_clock_params()
400 p0 = k; in calc_clock_params()
405 if (!p0 || !p1) in calc_clock_params()
408 param[0] = p0; in calc_clock_params()
/drivers/net/wireless/broadcom/brcm80211/brcmutil/
A Dutils.c297 void brcmu_prpkt(const char *msg, struct sk_buff *p0) in brcmu_prpkt() argument
304 for (p = p0; p; p = p->next) in brcmu_prpkt()
/drivers/gpu/drm/amd/display/dc/hubp/dcn401/
A Ddcn401_hubp.c660 MCACHEID_REG_READ_1H_P0, mcache_regs->main.p0.mcache_id_first, in hubp401_program_mcache_id_and_split_coordinate()
661 MCACHEID_REG_READ_2H_P0, mcache_regs->main.p0.mcache_id_second, in hubp401_program_mcache_id_and_split_coordinate()
664 MCACHEID_MALL_PREF_1H_P0, mcache_regs->mall.p0.mcache_id_first, in hubp401_program_mcache_id_and_split_coordinate()
665 MCACHEID_MALL_PREF_2H_P0, mcache_regs->mall.p0.mcache_id_second, in hubp401_program_mcache_id_and_split_coordinate()
670 VIEWPORT_MCACHE_SPLIT_COORDINATE, mcache_regs->main.p0.split_location, in hubp401_program_mcache_id_and_split_coordinate()
/drivers/media/platform/renesas/vsp1/
A Dvsp1_sru.c45 #define VI6_SRU_CTRL0_PARAMS(p0, p1) \ argument
46 (((p0) << VI6_SRU_CTRL0_PARAM0_SHIFT) | \
/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
A Ddma.h90 struct sk_buff *p0);
/drivers/net/wireless/marvell/libertas/
A Ddebugfs.c859 char *p0; in lbs_debugfs_write() local
871 p0 = pdata; in lbs_debugfs_write()
874 p = strstr(p0, d[i].name); in lbs_debugfs_write()
880 p0 = p1++; in lbs_debugfs_write()
/drivers/hwmon/
A Dcorsair-psu.c160 static int corsairpsu_usb_cmd(struct corsairpsu_data *priv, u8 p0, u8 p1, u8 p2, void *data) in corsairpsu_usb_cmd() argument
166 priv->cmd_buffer[0] = p0; in corsairpsu_usb_cmd()
186 if (p0 != priv->cmd_buffer[0] || p1 != priv->cmd_buffer[1]) in corsairpsu_usb_cmd()

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