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Searched refs:p1 (Results 1 – 25 of 125) sorted by relevance

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/drivers/thermal/qcom/
A Dtsens-v0_1.c122 p1[0] += 2; in fixup_8974_points()
123 p1[1] += 9; in fixup_8974_points()
124 p1[2] += 3; in fixup_8974_points()
125 p1[3] += 9; in fixup_8974_points()
126 p1[4] += 5; in fixup_8974_points()
127 p1[5] += 9; in fixup_8974_points()
128 p1[6] += 7; in fixup_8974_points()
129 p1[7] += 10; in fixup_8974_points()
130 p1[8] += 8; in fixup_8974_points()
131 p1[9] += 9; in fixup_8974_points()
[all …]
A Dtsens.c135 p1[i] = p1[i] + (base1 << shift); in tsens_read_calibration()
145 p1[i] = (p1[i] + base1) << shift; in tsens_read_calibration()
150 p1[i] = 500; in tsens_read_calibration()
163 p1[i] += priv->sensor[i].p1_calib_offset; in tsens_read_calibration()
172 u32 p1[MAX_SENSORS], p2[MAX_SENSORS]; in tsens_calibrate_nvmem() local
208 u32 *p1, u32 *p2, in tsens_read_calibration_legacy() argument
232 p1[i] = p1[i] + (base1 << format->base_shift); in tsens_read_calibration_legacy()
240 p1[i] = (p1[i] + base1) << format->base_shift; in tsens_read_calibration_legacy()
245 p1[i] = 500; in tsens_read_calibration_legacy()
268 __func__, i, p1[i], p2 ? p2[i] : 0); in compute_intercept_slope()
[all …]
/drivers/gpu/drm/omapdrm/
A Dtcm.h53 struct tcm_pt p1; member
228 slice->p0.y != slice->p1.y && in tcm_slice()
232 slice->p1.y = (slice->p0.x) ? slice->p0.y : slice->p1.y - 1; in tcm_slice()
235 parent->p0.y = slice->p1.y + 1; in tcm_slice()
247 area->p1.x < area->tcm->width && in tcm_area_is_valid()
248 area->p1.y < area->tcm->height && in tcm_area_is_valid()
249 area->p0.y <= area->p1.y && in tcm_area_is_valid()
254 area->p1.x + area->p1.y * area->tcm->width) || in tcm_area_is_valid()
257 area->p0.x <= area->p1.x)); in tcm_area_is_valid()
271 i <= a->p1.x + a->p1.y * a->tcm->width; in __tcm_is_in()
[all …]
A Dtcm-sita.c165 area->p1.x = (pos + num_slots - 1) % tcm->width; in sita_reserve_1d()
166 area->p1.y = (pos + num_slots - 1) / tcm->width; in sita_reserve_1d()
187 area->p1.x = area->p0.x + w - 1; in sita_reserve_2d()
188 area->p1.y = area->p0.y + h - 1; in sita_reserve_2d()
207 w = area->p1.x - area->p0.x + 1; in sita_free()
208 h = area->p1.y - area->p0.y + 1; in sita_free()
210 w = area->p1.x + area->p1.y * tcm->width - pos + 1; in sita_free()
A Domap_dmm_tiler.c488 .x1 = slice.p1.x, .y1 = slice.p1.y, in fill()
949 .p1.x = omap_dmm->container_width - 1, in omap_dmm_probe()
950 .p1.y = omap_dmm->container_height - 1, in omap_dmm_probe()
1038 if (a->p0.y + 1 < a->p1.y) { in map_1d_info()
1041 } else if (a->p0.y < a->p1.y) { in map_1d_info()
1047 0, a->p1.y - xdiv); in map_1d_info()
1059 a->p0.x, a->p1.x); in map_2d_info()
1119 &block->area.p1) == ' '; in tiler_map_show()
1128 &block->area.p1, in tiler_map_show()
1172 .p1.x = omap_dmm->container_width - 1, in omap_dmm_resume()
[all …]
/drivers/media/i2c/
A Daptina-pll.c23 unsigned int p1; in aptina_pll_calculate() local
132 for (p1 = p1_max & ~1; p1 >= p1_min; p1 -= 2) { in aptina_pll_calculate()
133 unsigned int mf_inc = p1 / gcd(div, p1); in aptina_pll_calculate()
137 mf_low = roundup(max(mf_min, DIV_ROUND_UP(pll->ext_clock * p1, in aptina_pll_calculate()
139 mf_high = min(mf_max, pll->ext_clock * p1 / in aptina_pll_calculate()
145 pll->n = div * mf_low / p1; in aptina_pll_calculate()
147 pll->p1 = p1; in aptina_pll_calculate()
148 dev_dbg(dev, "PLL: N %u M %u P1 %u\n", pll->n, pll->m, pll->p1); in aptina_pll_calculate()
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
A Di2c_.fuc102 bclr $flags $p1
106 bset $flags $p1
111 bclr $flags $p1
115 bset $flags $p1
175 bra not $p1 #i2c_start_rep
177 bra not $p1 #i2c_start_rep
210 bra not $p1 #i2c_bitw_out
229 xbit $r3 $flags $p1
230 bset $flags $p1
263 bclr $flags $p1 // nack
[all …]
/drivers/gpu/drm/i915/display/
A Dintel_dpll.c587 if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1) in intel_pll_is_valid()
676 for (clock.p1 = limit->p1.min; in i9xx_find_best_dpll()
677 clock.p1 <= limit->p1.max; clock.p1++) { in i9xx_find_best_dpll()
732 for (clock.p1 = limit->p1.min; in pnv_find_best_dpll()
733 clock.p1 <= limit->p1.max; clock.p1++) { in pnv_find_best_dpll()
793 for (clock.p1 = limit->p1.max; in g4x_find_best_dpll()
794 clock.p1 >= limit->p1.min; clock.p1--) { in g4x_find_best_dpll()
879 for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) { in vlv_find_best_dpll()
942 for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) { in chv_find_best_dpll()
1035 WARN_ON(reduced_clock->p1 != clock->p1); in i9xx_dpll()
[all …]
/drivers/gpu/drm/gma500/
A Doaktrail_crtc.c51 .p1 = {.min = MRST_P1_MIN, .max = MRST_P1_MAX_1},
57 .p1 = {.min = MRST_P1_MIN, .max = MRST_P1_MAX_0},
70 .p1 = {.min = 1, .max = 2},
123 clock->p1, clock->p2); in mrst_print_pll()
140 for (clock.p1 = limit->p1.min; in mrst_sdvo_find_best_pll()
141 clock.p1 <= limit->p1.max; clock.p1++) { in mrst_sdvo_find_best_pll()
143 clock.p = clock.p1 * limit->p2.p2_slow; in mrst_sdvo_find_best_pll()
195 for (clock.p1 = limit->p1.min; clock.p1 <= limit->p1.max; in mrst_lvds_find_best_pll()
196 clock.p1++) { in mrst_lvds_find_best_pll()
512 clock.p1 = (1L << (clock.p1 - 1)); in oaktrail_crtc_mode_set()
[all …]
A Dcdv_intel_display.c44 .p1 = {.min = 2, .max = 10},
71 .p1 = {.min = 1, .max = 9},
414 clock.p1 = 2; in cdv_intel_find_dp_pll()
420 clock.p1 = 1; in cdv_intel_find_dp_pll()
430 clock.p1 = 2; in cdv_intel_find_dp_pll()
436 clock.p1 = 1; in cdv_intel_find_dp_pll()
872 clock.p1 = in cdv_intel_crtc_clock_get()
876 if (clock.p1 == 0) { in cdv_intel_crtc_clock_get()
877 clock.p1 = 4; in cdv_intel_crtc_clock_get()
890 clock.p1 = 2; in cdv_intel_crtc_clock_get()
[all …]
A Dpsb_intel_display.c35 .p1 = {.min = 1, .max = 8},
47 .p1 = {.min = 1, .max = 8},
71 clock->p = clock->p1 * clock->p2; in psb_intel_clock()
173 dpll |= (1 << (clock.p1 - 1)) << 16; in psb_intel_crtc_mode_set()
341 clock.p1 = in psb_intel_crtc_clock_get()
355 clock.p1 = 2; in psb_intel_crtc_clock_get()
357 clock.p1 = in psb_intel_crtc_clock_get()
A Dgma_display.c723 if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1) in gma_pll_is_valid()
789 for (clock.p1 = limit->p1.min; in gma_find_best_pll()
790 clock.p1 <= limit->p1.max; in gma_find_best_pll()
791 clock.p1++) { in gma_find_best_pll()
/drivers/tty/vt/
A Dconmakehash.c84 char *p, *p1; in main() local
139 fp0 = strtol(p, &p1, 0); in main()
140 if (p1 == p) in main()
145 p = p1; in main()
152 fp1 = strtol(p, &p1, 0); in main()
153 if (p1 == p) in main()
158 p = p1; in main()
/drivers/input/touchscreen/
A Dmsg2638.c121 struct msg2138_packet *p0, *p1; in msg2138_ts_irq_handler() local
140 p1 = &touch_event.pkt[1]; in msg2138_ts_irq_handler()
144 if (p1->xy_hi == 0xFF && p1->y_low == 0xFF) in msg2138_ts_irq_handler()
145 msg2138_report_keys(msg2638, p1->x_low); in msg2138_ts_irq_handler()
157 if (p1->xy_hi == 0xFF && p1->x_low == 0xFF && p1->y_low == 0xFF) in msg2138_ts_irq_handler()
161 delta_x = ((p1->xy_hi & 0xF0) << 4) | p1->x_low; in msg2138_ts_irq_handler()
162 delta_y = ((p1->xy_hi & 0x0F) << 8) | p1->y_low; in msg2138_ts_irq_handler()
/drivers/i2c/busses/
A Di2c-mchp-pci1xxxx.c531 reg1 = readw(p1); in pci1xxxx_i2c_isr()
599 regval = readb(p1); in pci1xxxx_i2c_config_padctrl()
605 writeb(regval, p1); in pci1xxxx_i2c_config_padctrl()
651 reg1 = readb(p1); in pci1xxxx_i2c_configure_core_reg()
661 writeb(reg1, p1); in pci1xxxx_i2c_configure_core_reg()
709 void __iomem *p1 = i2c->i2c_base + SMB_GPR_REG; in pci1xxxx_i2c_init() local
721 regval = readl(p1); in pci1xxxx_i2c_init()
813 writeb(0, p1); in pci1xxxx_i2c_read()
929 writeb(0, p1); in pci1xxxx_i2c_write()
1107 regval = readw(p1); in pci1xxxx_i2c_resume()
[all …]
/drivers/gpu/drm/xe/tests/
A Dxe_guc_buf_kunit.c161 void *p1, *p2; in test_overlap() local
167 p1 = xe_guc_buf_cpu_ptr(b1); in test_overlap()
173 KUNIT_EXPECT_PTR_NE(test, p1, p2); in test_overlap()
174 if (p1 < p2) in test_overlap()
175 KUNIT_EXPECT_LT(test, (uintptr_t)(p1 + bytes - 1), (uintptr_t)p2); in test_overlap()
177 KUNIT_EXPECT_LT(test, (uintptr_t)(p2 + bytes - 1), (uintptr_t)p1); in test_overlap()
193 void *p1; in test_reusable() local
198 KUNIT_EXPECT_NOT_NULL(test, p1 = xe_guc_buf_cpu_ptr(b1)); in test_reusable()
203 KUNIT_EXPECT_PTR_EQ(test, p1, xe_guc_buf_cpu_ptr(b2)); in test_reusable()
/drivers/clk/
A Dclk-si5351.c36 unsigned long p1; member
138 params->p1 = buf[0]; in si5351_read_parameters()
159 buf[0] = params->p1 & 0xff; in si5351_write_parameters()
169 buf[4] = params->p1 & 0xff; in si5351_write_parameters()
483 hwdata->params.p1 = 128 * a; in si5351_pll_determine_rate()
485 hwdata->params.p1 -= 512; in si5351_pll_determine_rate()
622 m = hwdata->params.p1; in si5351_msynth_recalc_rate()
740 hwdata->params.p1 = 0; in si5351_msynth_determine_rate()
744 hwdata->params.p1 = a; in si5351_msynth_determine_rate()
748 hwdata->params.p1 = 128 * a; in si5351_msynth_determine_rate()
[all …]
/drivers/cpufreq/
A Dbrcmstb-avs-cpufreq.c170 unsigned int p1; member
341 static void brcm_avs_parse_p1(u32 p1, unsigned int *mdiv_p0, unsigned int *pdiv, in brcm_avs_parse_p1() argument
344 *mdiv_p0 = (p1 >> MDIV_P0_SHIFT) & MDIV_P0_MASK; in brcm_avs_parse_p1()
345 *pdiv = (p1 >> PDIV_SHIFT) & PDIV_MASK; in brcm_avs_parse_p1()
346 *ndiv = (p1 >> NDIV_INT_SHIFT) & NDIV_INT_MASK; in brcm_avs_parse_p1()
369 pmap->p1 = args[1]; in brcm_avs_get_pmap()
381 args[1] = pmap->p1; in brcm_avs_set_pmap()
694 brcm_avs_parse_p1(pmap.p1, &mdiv_p0, &pdiv, &ndiv); in show_brcm_avs_pmap()
698 pmap.p1, pmap.p2, ndiv, pdiv, mdiv_p0, mdiv_p1, mdiv_p2, in show_brcm_avs_pmap()
/drivers/gpu/drm/nouveau/dispnv04/
A Darb.c58 int found, mclk_extra, mclk_loop, cbs, m1, p1; in nv04_calc_arb() local
93 p1 = m1 * pclk_freq / mclk_freq; in nv04_calc_arb()
94 p1 = p1 * bpp / 8; in nv04_calc_arb()
95 if ((p1 < m1 && m1 > 0) || clwm > 519) { in nv04_calc_arb()
/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/
A Dgpc.fuc300 bra $p1 #wait
305 // fetch $flags and mask off $p1/$p2
310 // set $p1/$p2 according to transfer type
398 // $p1 clear on save, set on load
409 bra not $p1 #ctx_xfer_not_load
417 xbit $r2 $flags $p1 // SAVE/LOAD
424 xbit $r15 $flags $p1 // SAVE/LOAD
430 xbit $r10 $flags $p1 // direction
442 xbit $r10 $flags $p1 // direction
458 xbit $r10 $flags $p1 // direction
[all …]
A Dhub.fuc228 bra $p1 #wait
244 bclr $flags $p1
250 bset $flags $p1
257 bclr $flags $p1
266 bset $flags $p1
290 bclr $flags $p1
611 bra not $p1 #ctx_xfer_pre
619 bra not $p1 #ctx_xfer_exec
638 xbit $r15 $flags $p1
648 xbit $r2 $flags $p1 // SAVE/LOAD
[all …]
/drivers/gpu/drm/i915/
A Dintel_pcode.c244 int snb_pcode_read_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 *val) in snb_pcode_read_p() argument
251 | REG_FIELD_PREP(GEN6_PCODE_MB_PARAM1, p1) in snb_pcode_read_p()
260 int snb_pcode_write_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 val) in snb_pcode_write_p() argument
267 | REG_FIELD_PREP(GEN6_PCODE_MB_PARAM1, p1) in snb_pcode_write_p()
A Dintel_pcode.h27 int snb_pcode_read_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 *val);
28 int snb_pcode_write_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 val);
/drivers/isdn/mISDN/
A Dlayer2.c372 unsigned int p1; in cansend() local
375 p1 = (l2->vs - l2->va) % 128; in cansend()
377 p1 = (l2->vs - l2->va) % 8; in cansend()
1157 u_int p1; in invoke_retransmission() local
1169 p1 = (p1 + l2->sow) % l2->window; in invoke_retransmission()
1170 if (l2->windowar[p1]) in invoke_retransmission()
1176 l2->windowar[p1] = NULL; in invoke_retransmission()
1471 u_int i, p1; in l2_pull_iqueue() local
1499 p1 = (p1 + l2->sow) % l2->window; in l2_pull_iqueue()
1500 if (l2->windowar[p1]) { in l2_pull_iqueue()
[all …]
/drivers/gpu/drm/radeon/
A Dradeon_legacy_tv.c430 u16 p1, p2, h_inc; in radeon_legacy_tv_init_restarts() local
456 p1 = hor_timing_NTSC[H_TABLE_POS1]; in radeon_legacy_tv_init_restarts()
459 p1 = hor_timing_PAL[H_TABLE_POS1]; in radeon_legacy_tv_init_restarts()
463 p1 = (u16)((int)p1 + h_offset); in radeon_legacy_tv_init_restarts()
466 h_changed = (p1 != tv_dac->tv.h_code_timing[H_TABLE_POS1] || in radeon_legacy_tv_init_restarts()
469 tv_dac->tv.h_code_timing[H_TABLE_POS1] = p1; in radeon_legacy_tv_init_restarts()
492 const_ptr->def_restart, tv_dac->h_pos, tv_dac->v_pos, p1, p2, restart); in radeon_legacy_tv_init_restarts()

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