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Searched refs:panel_inst (Results 1 – 18 of 18) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dce/
A Ddmub_replay.c60 cmd.replay_enable.data.panel_inst = panel_inst; in dmub_replay_enable()
131 cmd.replay_set_power_opt.replay_set_power_opt_data.panel_inst = panel_inst; in dmub_replay_set_power_opt()
142 uint8_t panel_inst) in dmub_replay_copy_settings() argument
201 copy_settings_data->panel_inst = panel_inst; in dmub_replay_copy_settings()
238 uint8_t panel_inst) in dmub_replay_set_coasting_vtotal() argument
250 pCmd->replay_set_coasting_vtotal_data.panel_inst = panel_inst; in dmub_replay_set_coasting_vtotal()
263 uint16_t param = (uint16_t)(panel_inst << 8); in dmub_replay_residency()
324 pCmd->replay_set_power_opt_data.panel_inst = panel_inst; in dmub_replay_set_power_opt_and_coasting_vtotal()
365 cmd_element->sync_data.panel_inst; in dmub_replay_send_cmd()
378 cmd_element->panel_inst; in dmub_replay_send_cmd()
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A Ddmub_abm.c51 if (panel_inst == i) in abm_feature_support()
120 feature_support = abm_feature_support(abm, panel_inst); in dmub_abm_set_pause_ex()
123 ret = dmub_abm_set_pause(abm, pause, panel_inst, stream_inst); in dmub_abm_set_pause_ex()
139 unsigned int panel_inst, in dmub_abm_save_restore_ex() argument
146 feature_support = abm_feature_support(abm, panel_inst); in dmub_abm_save_restore_ex()
149 ret = dmub_abm_save_restore(dc, panel_inst, pData); in dmub_abm_save_restore_ex()
157 uint32_t panel_inst, in dmub_abm_set_pipe_ex() argument
163 feature_support = abm_feature_support(abm, panel_inst); in dmub_abm_set_pipe_ex()
166 ret = dmub_abm_set_pipe(abm, otg_inst, option, panel_inst, pwrseq_inst); in dmub_abm_set_pipe_ex()
175 unsigned int panel_inst) in dmub_abm_set_backlight_level_pwm_ex() argument
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A Ddmub_psr.c168 cmd.psr_set_version.psr_set_version_data.panel_inst = panel_inst; in dmub_psr_set_version()
190 cmd.psr_enable.data.panel_inst = panel_inst; in dmub_psr_enable()
207 dmub_psr_get_state(dmub, &state, panel_inst); in dmub_psr_enable()
236 dmub_psr_get_state(dmub, &state, panel_inst); in dmub_psr_set_level()
247 cmd.psr_set_level.psr_set_level_data.panel_inst = panel_inst; in dmub_psr_set_level()
284 cmd.psr_set_power_opt.psr_set_power_opt_data.panel_inst = panel_inst; in dmub_psr_set_power_opt()
295 uint8_t panel_inst) in dmub_psr_copy_settings() argument
381 copy_settings_data->panel_inst = panel_inst; in dmub_psr_copy_settings()
442 cmd.psr_force_static.psr_force_static_data.panel_inst = panel_inst; in dmub_psr_force_static()
455 uint8_t panel_inst, enum psr_residency_mode mode) in dmub_psr_get_residency() argument
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A Ddmub_psr.h41 struct psr_context *psr_context, uint8_t panel_inst);
43 uint8_t panel_inst);
45 uint8_t panel_inst);
47 uint8_t panel_inst);
48 void (*psr_force_static)(struct dmub_psr *dmub, uint8_t panel_inst);
50 uint8_t panel_inst, enum psr_residency_mode mode);
53 void (*psr_set_power_opt)(struct dmub_psr *dmub, unsigned int power_opt, uint8_t panel_inst);
A Ddmub_replay.h20 uint8_t panel_inst);
22 uint8_t panel_inst, struct dc_link *link);
24 struct replay_context *replay_context, uint8_t panel_inst);
26 uint8_t panel_inst);
30 uint8_t panel_inst);
32 uint8_t panel_inst, uint32_t *residency, const bool is_start, const enum pr_residency_mode mode);
34 unsigned int power_opt, uint8_t panel_inst, uint32_t coasting_vtotal);
A Ddmub_abm_lcd.h42 bool dmub_abm_set_pause(struct abm *abm, bool pause, unsigned int panel_inst, unsigned int stream_i…
45 unsigned int panel_inst,
47 bool dmub_abm_set_pipe(struct abm *abm, uint32_t otg_inst, uint32_t option, uint32_t panel_inst, ui…
51 unsigned int panel_inst);
53 unsigned int panel_inst);
A Ddmub_abm_lcd.c189 bool dmub_abm_set_pause(struct abm *abm, bool pause, unsigned int panel_inst, unsigned int stream_i… in dmub_abm_set_pause() argument
193 uint8_t panel_mask = 0x01 << panel_inst; in dmub_abm_set_pause()
221 unsigned int panel_inst, in dmub_abm_save_restore() argument
225 uint8_t panel_mask = 0x01 << panel_inst; in dmub_abm_save_restore()
257 uint32_t panel_inst, in dmub_abm_set_pipe() argument
270 cmd.abm_set_pipe.abm_set_pipe_data.panel_inst = panel_inst; in dmub_abm_set_pipe()
282 unsigned int panel_inst) in dmub_abm_set_backlight_level() argument
293 cmd.abm_set_backlight.abm_set_backlight_data.panel_mask = (0x01 << panel_inst); in dmub_abm_set_backlight_level()
302 unsigned int panel_inst) in dmub_abm_set_event() argument
312 cmd.abm_set_event.abm_set_event_data.panel_mask = (1<<panel_inst); in dmub_abm_set_event()
A Ddce_abm.c58 static bool dce_abm_set_pipe(struct abm *abm, uint32_t controller_id, uint32_t panel_inst) in dce_abm_set_pipe() argument
220 static bool dce_abm_immediate_disable(struct abm *abm, uint32_t panel_inst) in dce_abm_immediate_disable() argument
225 dce_abm_set_pipe(abm, MCP_DISABLE_ABM_IMMEDIATELY, panel_inst); in dce_abm_immediate_disable()
235 unsigned int panel_inst) in dce_abm_set_backlight_level_pwm() argument
246 panel_inst); in dce_abm_set_backlight_level_pwm()
/drivers/gpu/drm/amd/display/dc/link/protocols/
A Dlink_edp_panel_control.c590 unsigned int panel_inst; in edp_set_psr_allow_active() local
638 unsigned int panel_inst; in edp_get_psr_state() local
696 unsigned int panel_inst; in edp_setup_psr() local
896 unsigned int panel_inst; in edp_get_psr_residency() local
925 unsigned int panel_inst; in edp_set_replay_allow_active() local
958 unsigned int panel_inst; in edp_get_replay_state() local
977 unsigned int panel_inst; in edp_setup_replay() local
1070 unsigned int panel_inst; in edp_send_replay_cmd() local
1078 cmd_data->panel_inst = panel_inst; in edp_send_replay_cmd()
1093 unsigned int panel_inst; in edp_set_coasting_vtotal() local
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/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dabm.h41 bool (*set_abm_immediate_disable)(struct abm *abm, unsigned int panel_inst);
42 bool (*set_pipe)(struct abm *abm, unsigned int controller_id, unsigned int panel_inst);
51 unsigned int panel_inst);
59 bool (*set_abm_pause)(struct abm *abm, bool pause, unsigned int panel_inst, unsigned int otg_inst);
62 unsigned int panel_inst,
67 unsigned int panel_inst,
/drivers/gpu/drm/amd/display/dc/clk_mgr/
A Dclk_mgr.c101 unsigned int panel_inst; in clk_mgr_exit_optimized_pwr_state() local
108 for (panel_inst = 0; panel_inst < edp_num; panel_inst++) { in clk_mgr_exit_optimized_pwr_state()
111 edp_link = edp_links[panel_inst]; in clk_mgr_exit_optimized_pwr_state()
127 unsigned int panel_inst; in clk_mgr_optimize_pwr_state() local
131 for (panel_inst = 0; panel_inst < edp_num; panel_inst++) { in clk_mgr_optimize_pwr_state()
132 edp_link = edp_links[panel_inst]; in clk_mgr_optimize_pwr_state()
/drivers/gpu/drm/amd/display/dmub/inc/
A Ddmub_cmd.h629 uint16_t panel_inst; member
3383 uint8_t panel_inst; member
3447 uint8_t panel_inst; member
3474 uint8_t panel_inst; member
3518 uint8_t panel_inst; member
3549 uint8_t panel_inst; member
3624 uint8_t panel_inst; member
3762 uint8_t panel_inst; member
3809 uint8_t panel_inst; member
3847 uint8_t panel_inst; member
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/drivers/gpu/drm/amd/display/dc/hwss/dcn21/
A Ddcn21_hwseq.c141 uint32_t option, uint32_t panel_inst, uint32_t pwrseq_inst) in dcn21_dmub_abm_set_pipe() argument
153 cmd.abm_set_pipe.abm_set_pipe_data.panel_inst = panel_inst; in dcn21_dmub_abm_set_pipe()
163 uint32_t frame_ramp, uint32_t panel_inst) in dmub_abm_set_backlight() argument
173 cmd.abm_set_backlight.abm_set_backlight_data.panel_mask = (0x01 << panel_inst); in dmub_abm_set_backlight()
A Ddcn21_hwseq.h51 uint32_t option, uint32_t panel_inst, uint32_t pwrseq_inst);
/drivers/gpu/drm/amd/display/dc/
A Ddc_dmub_srv.h288 bool dc_dmub_srv_ips_residency_cntl(const struct dc_context *ctx, uint8_t panel_inst, bool start_me…
290 bool dc_dmub_srv_ips_query_residency_info(const struct dc_context *ctx, uint8_t panel_inst,
A Ddc_dmub_srv.c534 unsigned int panel_inst = 0; in dc_dmub_srv_get_visual_confirm_color_cmd() local
536 if (!dc_get_edp_link_panel_inst(dc, pipe_ctx->stream->link, &panel_inst) && in dc_dmub_srv_get_visual_confirm_color_cmd()
547 cmd.visual_confirm_color.visual_confirm_color_data.visual_confirm_color.panel_inst = panel_inst; in dc_dmub_srv_get_visual_confirm_color_cmd()
1031 unsigned int panel_inst = 0; in dc_build_cursor_update_payload0() local
1034 pipe_ctx->stream->link, &panel_inst)) in dc_build_cursor_update_payload0()
1049 payload->panel_inst = panel_inst; in dc_build_cursor_update_payload0()
1940 bool dc_dmub_srv_ips_residency_cntl(const struct dc_context *ctx, uint8_t panel_inst, bool start_me… in dc_dmub_srv_ips_residency_cntl() argument
1951 cmd.ips_residency_cntl.cntl_data.panel_inst = panel_inst; in dc_dmub_srv_ips_residency_cntl()
1960 bool dc_dmub_srv_ips_query_residency_info(const struct dc_context *ctx, uint8_t panel_inst, struct … in dc_dmub_srv_ips_query_residency_info() argument
1975 cmd.ips_query_residency_info.info_data.panel_inst = panel_inst; in dc_dmub_srv_ips_query_residency_info()
/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
A Ddcn31_hwseq.c671 struct set_backlight_level_params *backlight_level_params, uint32_t panel_inst) in dmub_abm_set_backlight() argument
687 cmd.abm_set_backlight.abm_set_backlight_data.panel_mask = (0x01 << panel_inst); in dmub_abm_set_backlight()
/drivers/gpu/drm/amd/display/dc/core/
A Ddc.c3728 unsigned int panel_inst = 0; in dc_dmub_update_dirty_rect() local
3733 if (!dc_get_edp_link_panel_inst(dc, stream->link, &panel_inst)) in dc_dmub_update_dirty_rect()
3765 update_dirty_rect->panel_inst = panel_inst; in dc_dmub_update_dirty_rect()
3784 unsigned int panel_inst = 0; in build_dmub_update_dirty_rect() local
3789 if (!dc_get_edp_link_panel_inst(dc, stream->link, &panel_inst)) in build_dmub_update_dirty_rect()
3819 update_dirty_rect->panel_inst = panel_inst; in build_dmub_update_dirty_rect()

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