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Searched refs:pfd (Results 1 – 6 of 6) sorted by relevance

/drivers/clk/imx/
A Dclk-pfdv2.c47 return readl_poll_timeout(pfd->reg, val, val & (1 << pfd->vld_bit), in clk_pfdv2_wait()
86 frac = (readl_relaxed(pfd->reg) >> pfd->frac_off) in clk_pfdv2_recalc_rate()
146 if (readl_relaxed(pfd->reg) & (1 << pfd->gate_bit)) in clk_pfdv2_is_enabled()
207 struct clk_pfdv2 *pfd; in imx_clk_hw_pfdv2() local
213 pfd = kzalloc(sizeof(*pfd), GFP_KERNEL); in imx_clk_hw_pfdv2()
214 if (!pfd) in imx_clk_hw_pfdv2()
217 pfd->reg = reg; in imx_clk_hw_pfdv2()
219 pfd->vld_bit = pfd->gate_bit - 1; in imx_clk_hw_pfdv2()
231 pfd->hw.init = &init; in imx_clk_hw_pfdv2()
233 hw = &pfd->hw; in imx_clk_hw_pfdv2()
[all …]
A Dclk-pfd.c40 writel_relaxed(1 << ((pfd->idx + 1) * 8 - 1), pfd->reg + CLR); in clk_pfd_enable()
49 writel_relaxed(1 << ((pfd->idx + 1) * 8 - 1), pfd->reg + SET); in clk_pfd_disable()
57 u8 frac = (readl_relaxed(pfd->reg) >> (pfd->idx * 8)) & 0x3f; in clk_pfd_recalc_rate()
102 writel_relaxed(0x3f << (pfd->idx * 8), pfd->reg + CLR); in clk_pfd_set_rate()
103 writel_relaxed(frac << (pfd->idx * 8), pfd->reg + SET); in clk_pfd_set_rate()
112 if (readl_relaxed(pfd->reg) & (1 << ((pfd->idx + 1) * 8 - 1))) in clk_pfd_is_enabled()
135 pfd = kzalloc(sizeof(*pfd), GFP_KERNEL); in imx_clk_hw_pfd()
136 if (!pfd) in imx_clk_hw_pfd()
139 pfd->reg = reg; in imx_clk_hw_pfd()
149 hw = &pfd->hw; in imx_clk_hw_pfd()
[all …]
A DMakefile17 mxc-clk-objs += clk-pfd.o
/drivers/clk/
A Dclk-versaclock3.c255 if (pfd->num == VC3_PFD1) { in vc3_pfd_recalc_rate()
284 if (prediv & pfd->mdiv2_bitmsk) in vc3_pfd_recalc_rate()
308 if (pfd->num == VC3_PFD1 || pfd->num == VC3_PFD3) { in vc3_pfd_round_rate()
329 regmap_update_bits(vc3->regmap, pfd->offs, pfd->mdiv1_bitmsk, in vc3_pfd_set_rate()
330 pfd->mdiv1_bitmsk); in vc3_pfd_set_rate()
331 regmap_update_bits(vc3->regmap, pfd->offs, pfd->mdiv2_bitmsk, 0); in vc3_pfd_set_rate()
338 regmap_update_bits(vc3->regmap, pfd->offs, pfd->mdiv2_bitmsk, in vc3_pfd_set_rate()
339 pfd->mdiv2_bitmsk); in vc3_pfd_set_rate()
340 regmap_update_bits(vc3->regmap, pfd->offs, pfd->mdiv1_bitmsk, 0); in vc3_pfd_set_rate()
342 if (pfd->num == VC3_PFD1) in vc3_pfd_set_rate()
[all …]
/drivers/pinctrl/mediatek/
A Dpinctrl-mtk-common-v2.c75 int field, struct mtk_pin_field *pfd) in mtk_hw_pin_field_lookup() argument
132 pfd->index = c->i_base; in mtk_hw_pin_field_lookup()
133 pfd->offset = c->s_addr + c->x_addrs * (bits / c->sz_reg); in mtk_hw_pin_field_lookup()
134 pfd->bitpos = bits % c->sz_reg; in mtk_hw_pin_field_lookup()
135 pfd->mask = (1 << c->x_bits) - 1; in mtk_hw_pin_field_lookup()
141 pfd->next = pfd->bitpos + c->x_bits > c->sz_reg ? c->x_addrs : 0; in mtk_hw_pin_field_lookup()
148 int field, struct mtk_pin_field *pfd) in mtk_hw_pin_field_get() argument
155 return mtk_hw_pin_field_lookup(hw, desc, field, pfd); in mtk_hw_pin_field_get()
/drivers/iio/frequency/
A Dadf4371.c220 unsigned long long pfd, in adf4371_pll_fract_n_compute() argument
229 tmp = do_div(vco, pfd); in adf4371_pll_fract_n_compute()
231 *fract2 = do_div(tmp, pfd); in adf4371_pll_fract_n_compute()
236 *mod2 = pfd; in adf4371_pll_fract_n_compute()

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