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Searched refs:pgd (Results 1 – 25 of 30) sorted by relevance

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/drivers/iommu/amd/
A Dio_pgtable_v2.c131 static u64 *v2_alloc_pte(int nid, u64 *pgd, unsigned long iova, in v2_alloc_pte() argument
139 pte = &pgd[PM_LEVEL_INDEX(level, iova)]; in v2_alloc_pte()
201 pte = &pgtable->pgd[PM_LEVEL_INDEX(level, iova)]; in fetch_pte()
254 pte = v2_alloc_pte(cfg->amd.nid, pgtable->pgd, in iommu_v2_map_pages()
336 if (!pgtable || !pgtable->pgd) in v2_free_pgtable()
340 free_pgtable(pgtable->pgd, get_pgtable_level()); in v2_free_pgtable()
341 pgtable->pgd = NULL; in v2_free_pgtable()
349 pgtable->pgd = iommu_alloc_pages_node_sz(cfg->amd.nid, GFP_KERNEL, SZ_4K); in v2_alloc_pgtable()
350 if (!pgtable->pgd) in v2_alloc_pgtable()
A Dpasid.c135 iommu_virt_to_phys(domain->mm->pgd)); in iommu_sva_set_dev_pasid()
/drivers/iommu/
A Dio-pgtable-dart.c74 void *pgd[DART_MAX_TABLES]; member
184 ptep = data->pgd[tbl]; in dart_get_l2()
245 ptep = data->pgd[tbl]; in dart_map_pages()
408 data->pgd[i] = in apple_dart_alloc_pgtable()
410 if (!data->pgd[i]) in apple_dart_alloc_pgtable()
412 cfg->apple_dart_cfg.ttbr[i] = virt_to_phys(data->pgd[i]); in apple_dart_alloc_pgtable()
419 iommu_free_pages(data->pgd[i]); in apple_dart_alloc_pgtable()
431 for (i = 0; i < (1 << data->tbl_bits) && data->pgd[i]; ++i) { in apple_dart_free_pgtable()
432 ptep = data->pgd[i]; in apple_dart_free_pgtable()
441 iommu_free_pages(data->pgd[i]); in apple_dart_free_pgtable()
A Dio-pgtable-arm.c166 void *pgd; member
557 arm_lpae_iopte *ptep = data->pgd; in arm_lpae_map_pages()
692 arm_lpae_iopte *ptep = data->pgd; in arm_lpae_unmap_pages()
862 arm_lpae_iopte *ptep = data->pgd; in arm_lpae_read_and_clear_dirty()
1049 data->pgd = __arm_lpae_alloc_pages(ARM_LPAE_PGD_SIZE(data), in arm_64_lpae_alloc_pgtable_s1()
1051 if (!data->pgd) in arm_64_lpae_alloc_pgtable_s1()
1058 cfg->arm_lpae_s1_cfg.ttbr = virt_to_phys(data->pgd); in arm_64_lpae_alloc_pgtable_s1()
1145 data->pgd = __arm_lpae_alloc_pages(ARM_LPAE_PGD_SIZE(data), in arm_64_lpae_alloc_pgtable_s2()
1147 if (!data->pgd) in arm_64_lpae_alloc_pgtable_s2()
1154 cfg->arm_lpae_s2_cfg.vttbr = virt_to_phys(data->pgd); in arm_64_lpae_alloc_pgtable_s2()
[all …]
A Dio-pgtable-arm-v7s.c167 arm_v7s_iopte *pgd; member
522 ret = __arm_v7s_map(data, iova, paddr, pgsize, prot, 1, data->pgd, in arm_v7s_map_pages()
546 arm_v7s_iopte pte = data->pgd[i]; in arm_v7s_free_pgtable()
552 __arm_v7s_free_table(data->pgd, 1, data); in arm_v7s_free_pgtable()
633 ret = __arm_v7s_unmap(data, gather, iova, pgsize, 1, data->pgd); in arm_v7s_unmap_pages()
648 arm_v7s_iopte *ptep = data->pgd, pte; in arm_v7s_iova_to_phys()
745 data->pgd = __arm_v7s_alloc_table(1, GFP_KERNEL, data); in arm_v7s_alloc_pgtable()
746 if (!data->pgd) in arm_v7s_alloc_pgtable()
753 paddr = virt_to_phys(data->pgd); in arm_v7s_alloc_pgtable()
A Domap-iommu.c1603 u32 *pgd, *pte; in omap_iommu_iova_to_phys() local
1610 iopgtable_lookup_entry(oiommu, da, &pgd, &pte); in omap_iommu_iova_to_phys()
1621 if (iopgd_is_section(*pgd)) in omap_iommu_iova_to_phys()
1622 ret = omap_iommu_translate(*pgd, da, IOSECTION_MASK); in omap_iommu_iova_to_phys()
1623 else if (iopgd_is_super(*pgd)) in omap_iommu_iova_to_phys()
1624 ret = omap_iommu_translate(*pgd, da, IOSUPER_MASK); in omap_iommu_iova_to_phys()
1626 dev_err(dev, "bogus pgd 0x%x, da 0x%llx", *pgd, in omap_iommu_iova_to_phys()
A Dexynos-iommu.c473 static void __sysmmu_set_ptbase(struct sysmmu_drvdata *data, phys_addr_t pgd) in __sysmmu_set_ptbase() argument
478 pt_base = pgd; in __sysmmu_set_ptbase()
480 pt_base = pgd >> SPAGE_ORDER; in __sysmmu_set_ptbase()
/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
A Dvmmgh100.c138 gh100_vmm_pd0_pde(struct nvkm_vmm *vmm, struct nvkm_vmm_pt *pgd, u32 pdei) in gh100_vmm_pd0_pde() argument
140 struct nvkm_vmm_pt *pgt = pgd->pde[pdei]; in gh100_vmm_pd0_pde()
141 struct nvkm_mmu_pt *pd = pgd->pt[0]; in gh100_vmm_pd0_pde()
179 gh100_vmm_pd1_pde(struct nvkm_vmm *vmm, struct nvkm_vmm_pt *pgd, u32 pdei) in gh100_vmm_pd1_pde() argument
181 struct nvkm_vmm_pt *pgt = pgd->pde[pdei]; in gh100_vmm_pd1_pde()
182 struct nvkm_mmu_pt *pd = pgd->pt[0]; in gh100_vmm_pd1_pde()
A Dvmm.c150 if (--pgd->refs[0]) { in nvkm_vmm_unref_pdes()
157 if (pgd->pt[0]) { in nvkm_vmm_unref_pdes()
160 pgd->pde[pdei] = NVKM_VMM_PDE_SPARSE; in nvkm_vmm_unref_pdes()
163 pgd->pde[pdei] = NULL; in nvkm_vmm_unref_pdes()
170 func->pde(vmm, pgd, pdei); in nvkm_vmm_unref_pdes()
171 pgd->pde[pdei] = NULL; in nvkm_vmm_unref_pdes()
177 func->pde(vmm, pgd, pdei); in nvkm_vmm_unref_pdes()
426 pgd->refs[0]++; in nvkm_vmm_ref_hwpt()
491 if (!pgd->refs[0]) in nvkm_vmm_ref_swpt()
496 pgd->pde[pdei] = pgt; in nvkm_vmm_ref_swpt()
[all …]
A Dvmmgp100.c236 gp100_vmm_pd0_pde(struct nvkm_vmm *vmm, struct nvkm_vmm_pt *pgd, u32 pdei) in gp100_vmm_pd0_pde() argument
238 struct nvkm_vmm_pt *pgt = pgd->pde[pdei]; in gp100_vmm_pd0_pde()
239 struct nvkm_mmu_pt *pd = pgd->pt[0]; in gp100_vmm_pd0_pde()
363 gp100_vmm_pd1_pde(struct nvkm_vmm *vmm, struct nvkm_vmm_pt *pgd, u32 pdei) in gp100_vmm_pd1_pde() argument
365 struct nvkm_vmm_pt *pgt = pgd->pde[pdei]; in gp100_vmm_pd1_pde()
366 struct nvkm_mmu_pt *pd = pgd->pt[0]; in gp100_vmm_pd1_pde()
A Dvmmgf100.c106 gf100_vmm_pgd_pde(struct nvkm_vmm *vmm, struct nvkm_vmm_pt *pgd, u32 pdei) in gf100_vmm_pgd_pde() argument
108 struct nvkm_vmm_pt *pgt = pgd->pde[pdei]; in gf100_vmm_pgd_pde()
109 struct nvkm_mmu_pt *pd = pgd->pt[0]; in gf100_vmm_pgd_pde()
A Dvmmnv50.c145 nv50_vmm_pgd_pde(struct nvkm_vmm *vmm, struct nvkm_vmm_pt *pgd, u32 pdei) in nv50_vmm_pgd_pde() argument
151 if (!nv50_vmm_pde(vmm, pgd->pde[pdei], &data)) in nv50_vmm_pgd_pde()
/drivers/iommu/intel/
A Dpasid.c487 struct dma_pte *pgd; in intel_pasid_setup_second_level() local
501 pgd = domain->pgd; in intel_pasid_setup_second_level()
502 pgd_val = virt_to_phys(pgd); in intel_pasid_setup_second_level()
532 struct dma_pte *pgd; in intel_pasid_replace_second_level() local
546 pgd = domain->pgd; in intel_pasid_replace_second_level()
547 pgd_val = virt_to_phys(pgd); in intel_pasid_replace_second_level()
750 struct dma_pte *pgd = s2_domain->pgd; in pasid_pte_config_nestd() local
773 pasid_set_slptr(pte, virt_to_phys(pgd)); in pasid_pte_config_nestd()
A Ddebugfs.c363 u64 pgd, path[6] = { 0 }; in domain_translation_struct_show() local
427 pgd = pasid_tbl_entry->val[2]; in domain_translation_struct_show()
431 pgd = pasid_tbl_entry->val[0]; in domain_translation_struct_show()
436 pgd &= VTD_PAGE_MASK; in domain_translation_struct_show()
438 pgd = context->lo & VTD_PAGE_MASK; in domain_translation_struct_show()
446 seq_printf(m, "with pasid %x @0x%llx\n", pasid, pgd); in domain_translation_struct_show()
448 seq_printf(m, "@0x%llx\n", pgd); in domain_translation_struct_show()
452 pgtable_walk_level(m, phys_to_virt(pgd), agaw + 2, 0, path); in domain_translation_struct_show()
A Diommu.c722 parent = domain->pgd; in pfn_to_dma_pte()
778 parent = domain->pgd; in dma_pfn_level_pte()
885 domain->pgd, 0, start_pfn, last_pfn); in dma_pte_free_pagetable()
889 iommu_free_pages(domain->pgd); in dma_pte_free_pagetable()
890 domain->pgd = NULL; in dma_pte_free_pagetable()
980 domain->pgd = NULL; in domain_unmap()
1463 struct dma_pte *pgd = domain->pgd; in domain_context_mapping_one() local
1767 struct dma_pte *pgd = domain->pgd; in domain_setup_first_level() local
1782 __pa(pgd), flags, old); in domain_setup_first_level()
3316 if (!domain->pgd) { in paging_domain_alloc()
[all …]
A Dsvm.c174 FLPT_DEFAULT_DID, __pa(mm->pgd), in intel_svm_set_dev_pasid()
/drivers/firmware/efi/
A Driscv-runtime.c34 efi_mm.pgd = pgd_alloc(&efi_mm); in efi_virtmap_init()
147 sync_kernel_mappings(efi_mm.pgd); in arch_efi_call_virt_setup()
A Darm-runtime.c56 efi_mm.pgd = pgd_alloc(&efi_mm); in efi_virtmap_init()
/drivers/pmdomain/
A Dgovernor.c313 struct genpd_governor_data *pgd = link->parent->gd; in _default_power_down_ok() local
315 if (pgd) in _default_power_down_ok()
316 pgd->max_off_time_changed = true; in _default_power_down_ok()
/drivers/gpu/drm/nouveau/nvkm/subdev/bar/
A Dnv50.h12 struct nvkm_gpuobj *pgd; member
A Dnv50.c124 ret = nvkm_gpuobj_new(device, 0x4000, 0, false, bar->mem, &bar->pgd); in nv50_bar_oneinit()
214 nvkm_gpuobj_del(&bar->pgd); in nv50_bar_dtor()
/drivers/gpu/drm/nouveau/include/nvkm/engine/
A Dfifo.h32 struct nvkm_gpuobj *pgd; member
/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
A Dg84.c53 ret = nvkm_gpuobj_new(device, 0x4000, 0, false, chan->inst, &chan->pgd); in g84_chan_ramfc_write()
A Dnv50.c94 ret = nvkm_gpuobj_new(device, 0x4000, 0, false, chan->inst, &chan->pgd); in nv50_chan_ramfc_write()
/drivers/iommu/arm/arm-smmu-v3/
A Darm-smmu-v3-sva.c93 target->data[1] = cpu_to_le64(virt_to_phys(mm->pgd) & in arm_smmu_make_sva_cd()

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