Searched refs:phase_offset (Results 1 – 9 of 9) sorted by relevance
| /drivers/dpll/zl3073x/ |
| A D | dpll.c | 53 s64 phase_offset; member
519 void *dpll_priv, s64 *phase_offset, in zl3073x_dpll_input_pin_phase_offset_get() argument
539 *phase_offset = 0; in zl3073x_dpll_input_pin_phase_offset_get()
551 *phase_offset = 0; in zl3073x_dpll_input_pin_phase_offset_get()
556 ref_phase = pin->phase_offset; in zl3073x_dpll_input_pin_phase_offset_get()
2006 s64 phase_offset; in zl3073x_dpll_pin_phase_offset_check() local
2045 rc = zl3073x_read_u48(zldev, reg, &phase_offset); in zl3073x_dpll_pin_phase_offset_check()
2054 phase_offset = div_s64(sign_extend64(phase_offset, 47), 100); in zl3073x_dpll_pin_phase_offset_check()
2057 if (phase_offset != pin->phase_offset) { in zl3073x_dpll_pin_phase_offset_check()
2059 pin->label, pin->phase_offset, phase_offset); in zl3073x_dpll_pin_phase_offset_check()
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| /drivers/net/ethernet/intel/ice/ |
| A D | ice_dpll.h | 51 s64 phase_offset; member
84 s64 phase_offset; member
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| A D | ice_dpll.c | 1835 *phase_offset = d->phase_offset * ICE_DPLL_PHASE_OFFSET_FACTOR; in ice_dpll_phase_offset_get()
1837 *phase_offset = p->phase_offset * ICE_DPLL_PHASE_OFFSET_FACTOR; in ice_dpll_phase_offset_get()
1839 *phase_offset = 0; in ice_dpll_phase_offset_get()
2559 s64 phase_offset, tmp; in ice_dpll_pps_update_phase_offsets() local
2576 phase_offset = 0; in ice_dpll_pps_update_phase_offsets()
2580 phase_offset += tmp << 8 * j; in ice_dpll_pps_update_phase_offsets()
2582 phase_offset += tmp << 8 * in ice_dpll_pps_update_phase_offsets()
2586 phase_offset = sign_extend64(phase_offset, 47); in ice_dpll_pps_update_phase_offsets()
2587 if (p->phase_offset != phase_offset) { in ice_dpll_pps_update_phase_offsets()
2590 p->idx, p->phase_offset, phase_offset); in ice_dpll_pps_update_phase_offsets()
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| A D | ice_ptp_hw.h | 365 u8 *ref_state, u8 *eec_mode, s64 *phase_offset,
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| A D | ice_common.h | 299 u8 *dpll_state, u8 *config, s64 *phase_offset,
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| A D | ice_common.c | 5417 u8 *dpll_state, u8 *config, s64 *phase_offset, in ice_aq_get_cgu_dpll_status() argument
5433 *phase_offset = le32_to_cpu(cmd->phase_offset_h); in ice_aq_get_cgu_dpll_status()
5434 *phase_offset <<= 32; in ice_aq_get_cgu_dpll_status()
5435 *phase_offset += le32_to_cpu(cmd->phase_offset_l); in ice_aq_get_cgu_dpll_status()
5436 *phase_offset = sign_extend64(*phase_offset, 47); in ice_aq_get_cgu_dpll_status()
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| A D | ice_ptp_hw.c | 5810 u8 *ref_state, u8 *eec_mode, s64 *phase_offset, in ice_get_cgu_state() argument
5826 if (phase_offset) in ice_get_cgu_state()
5827 *phase_offset = hw_phase_offset; in ice_get_cgu_state()
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| A D | ice_adminq_cmd.h | 2173 u8 phase_offset[ICE_CGU_INPUT_PHASE_OFFSET_BYTES]; member
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| /drivers/dpll/ |
| A D | dpll_netlink.c | 325 s64 phase_offset; in dpll_msg_add_phase_offset() local
331 dpll, dpll_priv(dpll), &phase_offset, in dpll_msg_add_phase_offset()
335 if (nla_put_64bit(msg, DPLL_A_PIN_PHASE_OFFSET, sizeof(phase_offset), in dpll_msg_add_phase_offset()
336 &phase_offset, DPLL_A_PIN_PAD)) in dpll_msg_add_phase_offset()
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Completed in 53 milliseconds