| /drivers/hwmon/pmbus/ |
| A D | mp2975.c | 245 return max_t(int, DIV_ROUND_CLOSEST(ret, data->info.phases[page]), in mp2975_read_phase()
369 ret = mp2975_data2reg_linear11(ret * info->phases[page] * 1000); in mp2973_read_word_data()
586 for (i = 0 ; i < info->phases[0]; i++) in mp2975_set_phase_rail1()
615 info->phases[0] = ret & GENMASK(3, 0); in mp2975_identify_multiphase()
625 if (info->phases[0] > data->max_phases[0]) in mp2975_identify_multiphase()
630 num_phases2 = min(data->max_phases[0] - info->phases[0], in mp2975_identify_multiphase()
632 if (info->phases[1] && info->phases[1] <= num_phases2) in mp2975_identify_multiphase()
683 if (info->phases[1]) in mp2975_identify_rails_vid()
711 if (info->phases[1]) in mp2973_identify_rails_vid()
1028 data->info.phases[1] = ret; in mp2975_probe()
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| A D | tps53679.c | 84 info->phases[0] = (ret & 0x07) + 1; in tps53679_identify_phases()
199 info->phases[0] = phases_a; in tps53676_identify()
202 info->phases[1] = phases_b; in tps53676_identify()
281 info->phases[0] = 6; in tps53679_probe()
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| A D | mp2856.c | 271 data->info.phases[0] = (ret > data->max_phases[0]) ? in mp2856_identify_multiphase_rail1()
274 for (i = 0 ; i < data->info.phases[0]; i++) in mp2856_identify_multiphase_rail1()
291 data->info.phases[1] = (ret > data->max_phases[1]) ? in mp2856_identify_multiphase_rail2()
294 for (i = 0 ; i < data->info.phases[0]; i++) in mp2856_identify_multiphase_rail2()
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| A D | pim4328.c | 187 info->phases[0] = 2; in pim4328_probe()
194 info->phases[0] = 2; in pim4328_probe()
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| A D | max16601.c | 219 info->phases[0] = reg; in max16601_identify()
242 .phases[0] = MAX16601_NUM_PHASES,
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| A D | mp2888.c | 309 info->phases[0] = ret & GENMASK(3, 0); in mp2888_identify_multiphase()
315 if (info->phases[0] > MP2888_MAX_PHASE) in mp2888_identify_multiphase()
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| A D | pmbus.h | 429 u8 phases[PMBUS_PAGES]; /* Number of phases per page */ member
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| A D | pmbus_core.c | 228 if (data->info->phases[page] && data->currphase != phase && in pmbus_set_page()
1665 if (info->phases[page]) { in pmbus_add_sensor_attrs()
1668 for (phase = 0; phase < info->phases[page]; in pmbus_add_sensor_attrs()
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| /drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | hwmgr_ppt.h | 41 uint8_t phases; member
68 uint8_t phases; member
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| A D | smu_helper.c | 707 dep_table->entries[i].phases = allowed_dep_table->entries[i].phases; in smu_get_voltage_dependency_table_ppt_v1()
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| /drivers/mmc/host/ |
| A D | sdhci-of-aspeed.c | 200 const struct mmc_clk_phase *phases, in aspeed_sdhci_phases_to_taps() argument
203 taps->valid = phases->valid; in aspeed_sdhci_phases_to_taps()
205 if (!phases->valid) in aspeed_sdhci_phases_to_taps()
208 taps->in = aspeed_sdhci_phase_to_tap(dev, rate, phases->in_deg); in aspeed_sdhci_phases_to_taps()
209 taps->out = aspeed_sdhci_phase_to_tap(dev, rate, phases->out_deg); in aspeed_sdhci_phases_to_taps()
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| /drivers/nfc/pn544/ |
| A D | pn544.c | 335 u8 phases = 0; in pn544_hci_start_poll() local
366 phases |= 1; /* Type A */ in pn544_hci_start_poll()
368 phases |= (1 << 2); /* Type F 212 */ in pn544_hci_start_poll()
369 phases |= (1 << 3); /* Type F 424 */ in pn544_hci_start_poll()
372 phases |= (1 << 5); /* NFC active */ in pn544_hci_start_poll()
375 PN544_PL_RDPHASES, &phases, 1); in pn544_hci_start_poll()
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| /drivers/gpu/drm/i915/gem/ |
| A D | i915_gem_pm.c | 139 struct list_head *phases[] = { in i915_gem_suspend_late() local
176 for (phase = phases; *phase; phase++) { in i915_gem_suspend_late()
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| A D | i915_gem_shrinker.c | 111 } phases[] = { in i915_gem_shrink() local
176 for (phase = phases; phase->list; phase++) { in i915_gem_shrink()
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| /drivers/vfio/pci/ |
| A D | vfio_pci_config.c | 1271 int ret, evcc, phases, vc_arb; in vfio_vc_cap_len() local
1284 phases = 128; in vfio_vc_cap_len()
1286 phases = 64; in vfio_vc_cap_len()
1288 phases = 32; in vfio_vc_cap_len()
1290 phases = 0; in vfio_vc_cap_len()
1292 vc_arb = phases * 4; in vfio_vc_cap_len()
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| /drivers/scsi/ |
| A D | NCR5380.c | 324 } phases[] = { variable
351 for (i = 0; (phases[i].value != PHASE_UNKNOWN) && in NCR5380_print_phase()
352 (phases[i].value != (status & PHASE_MASK)); ++i) in NCR5380_print_phase()
354 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name); in NCR5380_print_phase()
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| /drivers/scsi/arm/ |
| A D | fas216.c | 252 static const char *phases[] = { in fas216_bus_phase() local
259 return phases[stat & STAT_BUSMASK]; in fas216_bus_phase()
264 static const char *phases[] = { in fas216_drv_phase() local
278 if (info->scsi.phase < ARRAY_SIZE(phases) && in fas216_drv_phase()
279 phases[info->scsi.phase]) in fas216_drv_phase()
280 return phases[info->scsi.phase]; in fas216_drv_phase()
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| /drivers/gpu/drm/i915/gem/selftests/ |
| A D | i915_gem_context.c | 1348 } *phase, phases[] = { in igt_ctx_sseu() local
1359 for (i = 0, phase = phases; ret == 0 && i < ARRAY_SIZE(phases); in igt_ctx_sseu()
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| /drivers/gpu/drm/i915/selftests/ |
| A D | i915_vma.c | 802 } phases[] = { in igt_vma_partial() local
820 for (p = phases; p->name; p++) { /* exercise both create/lookup */ in igt_vma_partial()
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| A D | i915_gem_gtt.c | 438 } phases[] = { in fill_hole() local
455 for (p = phases; p->name; p++) { in fill_hole()
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| /drivers/gpu/drm/i915/gt/ |
| A D | selftest_hangcheck.c | 1253 } phases[] = { in igt_reset_engines() local
1269 typeof(*phases) *p; in igt_reset_engines()
1272 for (p = phases; p->name; p++) { in igt_reset_engines()
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| A D | selftest_timeline.c | 149 } phases[] = { in mock_hwsp_freelist() local
179 for (p = phases; p->name; p++) { in mock_hwsp_freelist()
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| A D | selftest_execlists.c | 682 } phases[] = { in live_error_interrupt() local
712 for (p = phases; p->error[0] != GOOD; p++) { in live_error_interrupt()
713 struct i915_request *client[ARRAY_SIZE(phases->error)]; in live_error_interrupt()
803 engine->name, p - phases, in live_error_interrupt()
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| /drivers/scsi/aic7xxx/ |
| A D | aic7xxx.seq | 475 * Now determine what phases the host wants us
599 * Data phases on the bus are from the
656 * Main loop for information transfer phases. Wait for the
921 * As a target, we control the phases,
1344 * For data-in phases, wait for any pending acks from the
1346 * send Ignore Wide Residue messages for data-in phases.
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| A D | aic7xxx.reg | 130 * Possible phases in SCSISIGI
161 * Possible phases to write into SCSISIG0
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