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Searched refs:phy_cfg (Results 1 – 25 of 32) sorted by relevance

12

/drivers/phy/broadcom/
A Dphy-bcm-sr-usb.c131 offset = phy_cfg->offset; in bcm_usb_ss_phy_init()
161 offset = phy_cfg->offset; in bcm_usb_hs_phy_init()
180 offset = phy_cfg->offset; in bcm_usb_phy_reset()
218 if (!phy_cfg) in bcm_usb_phy_xlate()
229 return phy_cfg->phy; in bcm_usb_phy_xlate()
242 if (!phy_cfg) in bcm_usb_phy_create()
260 phy_set_drvdata(phy_cfg[idx].phy, &phy_cfg[idx]); in bcm_usb_phy_create()
265 if (!phy_cfg) in bcm_usb_phy_create()
268 phy_cfg->regs = regs; in bcm_usb_phy_create()
273 if (IS_ERR(phy_cfg->phy)) in bcm_usb_phy_create()
[all …]
/drivers/phy/realtek/
A Dphy-rtk-usb2.c118 struct phy_cfg *phy_cfg; argument
265 struct phy_cfg *phy_cfg; in update_dc_disconnect_level_at_page0() local
274 phy_cfg = rtk_phy->phy_cfg; in update_dc_disconnect_level_at_page0()
338 struct phy_cfg *phy_cfg; in update_dc_disconnect_level_at_page1() local
378 struct phy_cfg *phy_cfg = rtk_phy->phy_cfg; in update_dc_disconnect_level() local
418 struct phy_cfg *phy_cfg; in update_dc_driving_level() local
453 struct phy_cfg *phy_cfg; in update_hs_clk_select() local
474 struct phy_cfg *phy_cfg; in do_rtk_phy_toggle() local
563 struct phy_cfg *phy_cfg; in do_rtk_phy_init() local
725 struct phy_cfg *phy_cfg; in rtk_usb2_parameter_show() local
[all …]
A Dphy-rtk-usb3.c88 struct phy_cfg *phy_cfg; argument
152 struct phy_cfg *phy_cfg = rtk_phy->phy_cfg; in do_rtk_usb3_phy_toggle() local
185 struct phy_cfg *phy_cfg; in do_rtk_phy_init() local
190 phy_cfg = rtk_phy->phy_cfg; in do_rtk_phy_init()
359 struct phy_cfg *phy_cfg; in rtk_usb3_parameter_show() local
362 phy_cfg = rtk_phy->phy_cfg; in rtk_usb3_parameter_show()
436 struct phy_cfg *phy_cfg = rtk_phy->phy_cfg; in get_phy_data_by_efuse() local
471 struct phy_cfg *phy_cfg; in update_amplitude_control_value() local
475 phy_cfg = rtk_phy->phy_cfg; in update_amplitude_control_value()
565 const struct phy_cfg *phy_cfg; in rtk_usb3phy_probe() local
[all …]
/drivers/net/ethernet/sfc/
A Dmcdi_port_common.c234 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; in efx_get_mcdi_phy_flags() local
376 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; in efx_mcdi_phy_check_fcntl() local
538 cmd->base.phy_address = phy_cfg->port; in efx_mcdi_phy_get_link_ksettings()
541 mcdi_to_ethtool_linkset(phy_cfg->media, phy_cfg->supported_cap, in efx_mcdi_phy_get_link_ksettings()
551 mcdi_to_ethtool_linkset(phy_cfg->media, in efx_mcdi_phy_get_link_ksettings()
595 phy_cfg->forced_cap = 0; in efx_mcdi_phy_set_link_ksettings()
598 phy_cfg->forced_cap = caps; in efx_mcdi_phy_set_link_ksettings()
685 caps = phy_cfg->forced_cap; in efx_mcdi_phy_set_fecparam()
724 phy_cfg->forced_cap); in efx_mcdi_port_reconfigure()
823 (phy_cfg->flags & in efx_mcdi_phy_run_tests()
[all …]
/drivers/net/ethernet/sfc/siena/
A Dmcdi_port_common.c235 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; in efx_get_mcdi_phy_flags() local
377 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; in efx_mcdi_phy_check_fcntl() local
549 cmd->base.phy_address = phy_cfg->port; in efx_siena_mcdi_phy_get_link_ksettings()
554 mcdi_to_ethtool_linkset(phy_cfg->media, phy_cfg->supported_cap, in efx_siena_mcdi_phy_get_link_ksettings()
564 mcdi_to_ethtool_linkset(phy_cfg->media, in efx_siena_mcdi_phy_get_link_ksettings()
610 phy_cfg->forced_cap = 0; in efx_siena_mcdi_phy_set_link_ksettings()
613 phy_cfg->forced_cap = caps; in efx_siena_mcdi_phy_set_link_ksettings()
702 caps = phy_cfg->forced_cap; in efx_siena_mcdi_phy_set_fecparam()
741 phy_cfg->forced_cap); in efx_siena_mcdi_port_reconfigure()
841 (phy_cfg->flags & in efx_siena_mcdi_phy_run_tests()
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/drivers/net/usb/
A Daqc111.c331 aqc111_data->phy_cfg |= AQ_PAUSE; in aqc111_set_phy_speed()
341 aqc111_data->phy_cfg |= AQ_ADV_5G; in aqc111_set_phy_speed()
347 aqc111_data->phy_cfg |= AQ_ADV_1G; in aqc111_set_phy_speed()
356 aqc111_data->phy_cfg |= AQ_ADV_5G; in aqc111_set_phy_speed()
776 &aqc111_data->phy_cfg); in aqc111_unbind()
1012 &aqc111_data->phy_cfg); in aqc111_reset()
1055 &aqc111_data->phy_cfg); in aqc111_stop()
1367 aqc111_data->phy_cfg |= AQ_WOL; in aqc111_suspend()
1406 &aqc111_data->phy_cfg); in aqc111_suspend()
1410 &aqc111_data->phy_cfg); in aqc111_suspend()
[all …]
A Daqc111.h173 u32 phy_cfg; member
/drivers/phy/rockchip/
A Dphy-rockchip-inno-usb2.c260 const struct rockchip_usb2phy_cfg *phy_cfg; member
844 &rphy->phy_cfg->chg_det.dp_det); in rockchip_chg_detect_work()
862 &rphy->phy_cfg->chg_det.cp_det); in rockchip_chg_detect_work()
884 &rphy->phy_cfg->chg_det.dcp_det); in rockchip_chg_detect_work()
1404 rphy->phy_cfg = &phy_cfgs[index]; in rockchip_usb2phy_probe()
1411 if (!rphy->phy_cfg) { in rockchip_usb2phy_probe()
1440 if (rphy->phy_cfg->phy_tuning) { in rockchip_usb2phy_probe()
1441 ret = rphy->phy_cfg->phy_tuning(rphy); in rockchip_usb2phy_probe()
1516 u32 reg = rphy->phy_cfg->reg; in rk3576_usb2phy_tuning()
1547 if (rphy->phy_cfg->reg == 0x0000 || rphy->phy_cfg->reg == 0x4000) { in rk3588_usb2phy_tuning()
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A Dphy-rockchip-inno-hdmi.c283 const struct phy_config *phy_cfg);
627 for (; phy_cfg->tmdsclock != 0; phy_cfg++) in inno_hdmi_phy_power_on()
628 if (tmdsclock <= phy_cfg->tmdsclock) in inno_hdmi_phy_power_on()
631 if (cfg->tmdsclock == 0 || phy_cfg->tmdsclock == 0) in inno_hdmi_phy_power_on()
1057 const struct phy_config *phy_cfg) in inno_hdmi_phy_rk3228_power_on() argument
1089 inno_write(inno, 0xef + v, phy_cfg->regs[v]); in inno_hdmi_phy_rk3228_power_on()
1172 const struct phy_config *phy_cfg) in inno_hdmi_phy_rk3328_power_on() argument
1199 inno_write(inno, 0xb5 + v, phy_cfg->regs[v]); in inno_hdmi_phy_rk3328_power_on()
1206 if (phy_cfg->tmdsclock > 340000000) { in inno_hdmi_phy_rk3328_power_on()
1219 if (phy_cfg->tmdsclock > 165000000) in inno_hdmi_phy_rk3328_power_on()
[all …]
A Dphy-rockchip-naneng-combphy.c342 const struct rockchip_combphy_cfg *phy_cfg; in rockchip_combphy_probe() local
346 phy_cfg = of_device_get_match_data(dev); in rockchip_combphy_probe()
347 if (!phy_cfg) { in rockchip_combphy_probe()
364 for (id = 0; id < phy_cfg->num_phys; id++) { in rockchip_combphy_probe()
365 if (res->start == phy_cfg->phy_ids[id]) { in rockchip_combphy_probe()
373 priv->cfg = phy_cfg; in rockchip_combphy_probe()
/drivers/gpu/drm/bridge/imx/
A Dimx8qm-ldb.c70 struct phy_configure_opts_lvds *phy_cfg) in imx8qm_ldb_set_phy_cfg() argument
72 phy_cfg->bits_per_lane_and_dclk_cycle = 7; in imx8qm_ldb_set_phy_cfg()
73 phy_cfg->lanes = 4; in imx8qm_ldb_set_phy_cfg()
74 phy_cfg->differential_clk_rate = is_split ? di_clk / 2 : di_clk; in imx8qm_ldb_set_phy_cfg()
75 phy_cfg->is_slave = is_slave; in imx8qm_ldb_set_phy_cfg()
92 struct phy_configure_opts_lvds *phy_cfg = &opts.lvds; in imx8qm_ldb_bridge_atomic_check() local
100 imx8qm_ldb_set_phy_cfg(imx8qm_ldb, di_clk, is_split, false, phy_cfg); in imx8qm_ldb_bridge_atomic_check()
112 phy_cfg); in imx8qm_ldb_bridge_atomic_check()
139 struct phy_configure_opts_lvds *phy_cfg = &opts.lvds; in imx8qm_ldb_bridge_mode_set() local
154 imx8qm_ldb_set_phy_cfg(imx8qm_ldb, di_clk, is_split, false, phy_cfg); in imx8qm_ldb_bridge_mode_set()
[all …]
A Dimx93-mipi-dsi.c100 union phy_configure_opts phy_cfg; member
469 union phy_configure_opts *phy_cfg, in imx93_dsi_get_phy_configure_opts() argument
483 lanes, &phy_cfg->mipi_dphy); in imx93_dsi_get_phy_configure_opts()
523 union phy_configure_opts phy_cfg; in imx93_dsi_validate_phy() local
528 ret = imx93_dsi_get_phy_configure_opts(dsi, mode, &phy_cfg, lanes, in imx93_dsi_validate_phy()
535 ret = dphy_pll_get_configure_from_opts(dsi, &phy_cfg.mipi_dphy, &cfg); in imx93_dsi_validate_phy()
658 ret = dphy_pll_configure(dsi, &dsi->phy_cfg); in imx93_dsi_phy_init()
682 union phy_configure_opts phy_cfg; in imx93_dsi_get_lane_mbps() local
686 ret = imx93_dsi_get_phy_configure_opts(dsi, mode, &phy_cfg, lanes, in imx93_dsi_get_lane_mbps()
693 *lane_mbps = DIV_ROUND_UP(phy_cfg.mipi_dphy.hs_clk_rate, USEC_PER_SEC); in imx93_dsi_get_lane_mbps()
[all …]
A Dimx8qxp-ldb.c67 struct phy_configure_opts_lvds *phy_cfg) in imx8qxp_ldb_set_phy_cfg() argument
69 phy_cfg->bits_per_lane_and_dclk_cycle = 7; in imx8qxp_ldb_set_phy_cfg()
70 phy_cfg->lanes = 4; in imx8qxp_ldb_set_phy_cfg()
73 phy_cfg->differential_clk_rate = di_clk / 2; in imx8qxp_ldb_set_phy_cfg()
74 phy_cfg->is_slave = !imx8qxp_ldb->companion; in imx8qxp_ldb_set_phy_cfg()
76 phy_cfg->differential_clk_rate = di_clk; in imx8qxp_ldb_set_phy_cfg()
77 phy_cfg->is_slave = false; in imx8qxp_ldb_set_phy_cfg()
97 struct phy_configure_opts_lvds *phy_cfg = &opts.lvds; in imx8qxp_ldb_bridge_atomic_check() local
105 imx8qxp_ldb_set_phy_cfg(imx8qxp_ldb, di_clk, is_split, phy_cfg); in imx8qxp_ldb_bridge_atomic_check()
139 struct phy_configure_opts_lvds *phy_cfg = &opts.lvds; in imx8qxp_ldb_bridge_mode_set() local
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/drivers/gpu/drm/bridge/cadence/
A Dcdns-mhdp8546-core.c832 memset(phy_cfg.dp.voltage, 0, sizeof(phy_cfg.dp.voltage)); in cdns_mhdp_link_training_init()
833 memset(phy_cfg.dp.pre, 0, sizeof(phy_cfg.dp.pre)); in cdns_mhdp_link_training_init()
836 phy_cfg.dp.set_lanes = true; in cdns_mhdp_link_training_init()
837 phy_cfg.dp.set_rate = true; in cdns_mhdp_link_training_init()
894 phy_cfg->dp.pre[i] = set_pre; in cdns_mhdp_get_adjust_train()
1001 &phy_cfg); in cdns_mhdp_link_training_channel_eq()
1005 phy_cfg.dp.set_rate = false; in cdns_mhdp_link_training_channel_eq()
1023 &phy_cfg); in cdns_mhdp_link_training_channel_eq()
1122 &phy_cfg); in cdns_mhdp_link_training_cr()
1126 phy_cfg.dp.set_rate = false; in cdns_mhdp_link_training_cr()
[all …]
A Dcdns-dsi-core.c526 struct phy_configure_opts_mipi_dphy *phy_cfg, in cdns_dsi_adjust_phy_config() argument
564 phy_cfg->hs_clk_rate = dlane_bps * 8; in cdns_dsi_adjust_phy_config()
579 struct phy_configure_opts_mipi_dphy *phy_cfg = &output->phy_opts.mipi_dphy; in cdns_dsi_check_conf() local
591 nlanes, phy_cfg); in cdns_dsi_check_conf()
595 ret = cdns_dsi_adjust_phy_config(dsi, dsi_cfg, phy_cfg, mode, mode_valid_check); in cdns_dsi_check_conf()
612 if ((u64)phy_cfg->hs_clk_rate * in cdns_dsi_check_conf()
794 struct phy_configure_opts_mipi_dphy *phy_cfg = &output->phy_opts.mipi_dphy; in cdns_dsi_bridge_atomic_pre_enable() local
884 phy_cfg->hs_clk_rate); in cdns_dsi_bridge_atomic_pre_enable()
885 reg_wakeup = (phy_cfg->hs_prepare + phy_cfg->hs_zero) / tx_byte_period; in cdns_dsi_bridge_atomic_pre_enable()
/drivers/scsi/mvsas/
A Dmv_94xx.c169 phy_cfg.v = 0; in set_phy_rate()
171 phy_cfg.u.sas_support = 1; in set_phy_rate()
172 phy_cfg.u.sata_support = 1; in set_phy_rate()
173 phy_cfg.u.sata_host_mode = 1; in set_phy_rate()
178 phy_cfg.u.speed_support = 1; in set_phy_rate()
179 phy_cfg.u.snw_3_support = 0; in set_phy_rate()
180 phy_cfg.u.tx_lnk_parity = 1; in set_phy_rate()
186 phy_cfg.u.speed_support = 3; in set_phy_rate()
193 phy_cfg.u.speed_support = 7; in set_phy_rate()
194 phy_cfg.u.snw_3_support = 1; in set_phy_rate()
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/drivers/phy/samsung/
A Dphy-exynos5-usbdrd.c867 inst->phy_cfg->phy_init(phy_drd); in exynos5_usbdrd_phy_init()
1941 .phy_cfg = phy_cfg_exynos2200,
1954 .phy_cfg = phy_cfg_exynos5,
1967 .phy_cfg = phy_cfg_exynos5,
1979 .phy_cfg = phy_cfg_exynos5,
1992 .phy_cfg = phy_cfg_exynos5,
2004 .phy_cfg = phy_cfg_exynos7870,
2017 .phy_cfg = phy_cfg_exynos850,
2045 .phy_cfg = phy_cfg_exynos850,
2222 .phy_cfg = phy_cfg_gs101,
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/drivers/gpu/drm/bridge/analogix/
A Danalogix_dp_reg.c524 union phy_configure_opts phy_cfg = {0}; in analogix_dp_set_link_bandwidth() local
526 phy_cfg.dp.link_rate = in analogix_dp_set_link_bandwidth()
528 phy_cfg.dp.set_rate = true; in analogix_dp_set_link_bandwidth()
529 ret = phy_configure(dp->phy, &phy_cfg); in analogix_dp_set_link_bandwidth()
554 union phy_configure_opts phy_cfg = {0}; in analogix_dp_set_lane_count() local
557 phy_cfg.dp.set_lanes = true; in analogix_dp_set_lane_count()
558 ret = phy_configure(dp->phy, &phy_cfg); in analogix_dp_set_lane_count()
584 union phy_configure_opts phy_cfg = {0}; in analogix_dp_set_lane_link_training() local
594 phy_cfg.dp.voltage[lane] = vs; in analogix_dp_set_lane_link_training()
595 phy_cfg.dp.pre[lane] = pe; in analogix_dp_set_lane_link_training()
[all …]
/drivers/net/wireless/intel/iwlwifi/fw/api/
A Dconfig.h85 __le32 phy_cfg; member
97 __le32 phy_cfg; member
/drivers/net/phy/
A Dmicrochip_t1.c1342 static const struct lan887x_regwr_map phy_cfg[] = { in lan887x_phy_setup() local
1372 return lan887x_phy_config(phydev, phy_cfg, ARRAY_SIZE(phy_cfg)); in lan887x_phy_setup()
1382 static const struct lan887x_regwr_map phy_cfg[] = { in lan887x_100M_setup() local
1388 ret = lan887x_phy_config(phydev, phy_cfg, ARRAY_SIZE(phy_cfg)); in lan887x_100M_setup()
1390 static const struct lan887x_regwr_map phy_cfg[] = { in lan887x_100M_setup() local
1395 ret = lan887x_phy_config(phydev, phy_cfg, ARRAY_SIZE(phy_cfg)); in lan887x_100M_setup()
1406 static const struct lan887x_regwr_map phy_cfg[] = { in lan887x_1000M_setup() local
1413 ret = lan887x_phy_config(phydev, phy_cfg, ARRAY_SIZE(phy_cfg)); in lan887x_1000M_setup()
/drivers/net/ethernet/qlogic/qed/
A Dqed_mcp.c1519 struct eth_phy_cfg phy_cfg; in qed_mcp_set_link() local
1525 memset(&phy_cfg, 0, sizeof(phy_cfg)); in qed_mcp_set_link()
1542 phy_cfg.eee_cfg |= EEE_CFG_EEE_ENABLED; in qed_mcp_set_link()
1544 phy_cfg.eee_cfg |= EEE_CFG_TX_LPI; in qed_mcp_set_link()
1546 phy_cfg.eee_cfg |= EEE_CFG_ADV_SPEED_1G; in qed_mcp_set_link()
1619 phy_cfg.extended_speed |= ext_speed; in qed_mcp_set_link()
1630 phy_cfg.speed, phy_cfg.pause, phy_cfg.adv_speed, in qed_mcp_set_link()
1631 phy_cfg.loopback_mode, phy_cfg.fec_mode, in qed_mcp_set_link()
1632 phy_cfg.extended_speed); in qed_mcp_set_link()
1639 mb_params.p_data_src = &phy_cfg; in qed_mcp_set_link()
[all …]
/drivers/net/wireless/intel/iwlwifi/mld/
A Dphy.c178 .phy_cfg = cpu_to_le32(iwl_mld_get_phy_config(mld)), in iwl_mld_send_phy_cfg_cmd()
184 IWL_DEBUG_INFO(mld, "Sending Phy CFG command: 0x%x\n", cmd.phy_cfg); in iwl_mld_send_phy_cfg_cmd()
/drivers/net/ethernet/intel/ixgbe/
A Dixgbe_e610.c2162 struct ixgbe_aci_cmd_set_phy_cfg_data phy_cfg = {}; in ixgbe_set_phy_power_e610() local
2171 ixgbe_copy_phy_caps_to_cfg(&phy_caps, &phy_cfg); in ixgbe_set_phy_power_e610()
2174 phy_cfg.caps &= ~IXGBE_ACI_PHY_ENA_LOW_POWER; in ixgbe_set_phy_power_e610()
2176 phy_cfg.caps |= IXGBE_ACI_PHY_ENA_LOW_POWER; in ixgbe_set_phy_power_e610()
2179 if (phy_caps.caps == phy_cfg.caps) in ixgbe_set_phy_power_e610()
2182 phy_cfg.caps |= IXGBE_ACI_PHY_ENA_LINK; in ixgbe_set_phy_power_e610()
2183 phy_cfg.caps |= IXGBE_ACI_PHY_ENA_AUTO_LINK_UPDT; in ixgbe_set_phy_power_e610()
2185 return ixgbe_aci_set_phy_cfg(hw, &phy_cfg); in ixgbe_set_phy_power_e610()
2201 struct ixgbe_aci_cmd_set_phy_cfg_data phy_cfg = {}; in ixgbe_enter_lplu_e610() local
2210 ixgbe_copy_phy_caps_to_cfg(&phy_caps, &phy_cfg); in ixgbe_enter_lplu_e610()
[all …]
/drivers/gpu/drm/bridge/
A Dnwl-dsi.c71 union phy_configure_opts phy_cfg; member
215 struct phy_configure_opts_mipi_dphy *cfg = &dsi->phy_cfg.mipi_dphy; in nwl_dsi_config_host()
655 union phy_configure_opts *phy_cfg = &dsi->phy_cfg; in nwl_dsi_mode_set() local
675 ret = phy_configure(dsi->phy, phy_cfg); in nwl_dsi_mode_set()
859 memcpy(&dsi->phy_cfg, &new_cfg, sizeof(new_cfg)); in nwl_dsi_bridge_mode_set()
/drivers/phy/intel/
A Dphy-intel-lgm-combo.c142 int (*phy_cfg)(struct intel_cbphy_iphy *)) in intel_cbphy_iphy_cfg()
147 ret = phy_cfg(iphy); in intel_cbphy_iphy_cfg()
154 return phy_cfg(&cbphy->iphy[PHY_1]); in intel_cbphy_iphy_cfg()

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