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Searched refs:phy_opts (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/meson/
A Dmeson_dw_mipi_dsi.c41 union phy_configure_opts phy_opts; member
83 mipi_dsi->phy_opts.mipi_dphy.hs_clk_rate); in dw_mipi_dsi_phy_init()
86 mipi_dsi->phy_opts.mipi_dphy.hs_clk_rate, ret); in dw_mipi_dsi_phy_init()
135 return phy_configure(mipi_dsi->phy, &mipi_dsi->phy_opts); in dw_mipi_dsi_phy_init()
171 &mipi_dsi->phy_opts.mipi_dphy); in dw_mipi_dsi_get_lane_mbps()
173 *lane_mbps = DIV_ROUND_UP(mipi_dsi->phy_opts.mipi_dphy.hs_clk_rate, USEC_PER_SEC); in dw_mipi_dsi_get_lane_mbps()
/drivers/gpu/drm/rockchip/
A Ddw-mipi-dsi2-rockchip.c71 union phy_configure_opts phy_opts; member
113 phy_configure(dsi2->phy, &dsi2->phy_opts); in dw_mipi_dsi2_phy_power_on()
165 &dsi2->phy_opts.mipi_dphy); in dw_mipi_dsi2_get_lane_mbps()
183 struct phy_configure_opts_mipi_dphy *cfg = &dsi2->phy_opts.mipi_dphy; in dw_mipi_dsi2_phy_get_timing()
A Ddw-mipi-dsi-rockchip.c280 union phy_configure_opts phy_opts; member
538 phy_configure(dsi->phy, &dsi->phy_opts); in dw_mipi_dsi_phy_power_on()
590 &dsi->phy_opts.mipi_dphy); in dw_mipi_dsi_get_lane_mbps()
/drivers/gpu/drm/msm/dp/
A Ddp_ctrl.c132 union phy_configure_opts phy_opts; member
1298 union phy_configure_opts *phy_opts = &ctrl->phy_opts; in msm_dp_ctrl_set_vx_px() local
1301 phy_opts->dp.voltage[0] = v_level; in msm_dp_ctrl_set_vx_px()
1302 phy_opts->dp.pre[0] = p_level; in msm_dp_ctrl_set_vx_px()
1303 phy_opts->dp.set_voltages = 1; in msm_dp_ctrl_set_vx_px()
1304 phy_configure(ctrl->phy, phy_opts); in msm_dp_ctrl_set_vx_px()
1305 phy_opts->dp.set_voltages = 0; in msm_dp_ctrl_set_vx_px()
1785 ctrl->phy_opts.dp.lanes = ctrl->link->link_params.num_lanes; in msm_dp_ctrl_enable_mainlink_clocks()
1787 ctrl->phy_opts.dp.ssc = drm_dp_max_downspread(dpcd); in msm_dp_ctrl_enable_mainlink_clocks()
1789 phy_configure(phy, &ctrl->phy_opts); in msm_dp_ctrl_enable_mainlink_clocks()
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/drivers/gpu/drm/bridge/cadence/
A Dcdns-dsi-core.h24 union phy_configure_opts phy_opts; member
A Dcdns-dsi-core.c579 struct phy_configure_opts_mipi_dphy *phy_cfg = &output->phy_opts.mipi_dphy; in cdns_dsi_check_conf()
599 ret = phy_validate(dsi->dphy, PHY_MODE_MIPI_DPHY, 0, &output->phy_opts); in cdns_dsi_check_conf()
731 phy_configure(dsi->dphy, &output->phy_opts); in cdns_dsi_hs_init()
794 struct phy_configure_opts_mipi_dphy *phy_cfg = &output->phy_opts.mipi_dphy; in cdns_dsi_bridge_atomic_pre_enable()
/drivers/gpu/drm/bridge/
A Dnwl-dsi.c776 union phy_configure_opts *phy_opts) in nwl_dsi_get_dphy_params() argument
790 &phy_opts->mipi_dphy); in nwl_dsi_get_dphy_params()
796 phy_opts->mipi_dphy.lp_clk_rate = rate; in nwl_dsi_get_dphy_params()
/drivers/gpu/drm/mediatek/
A Dmtk_dp.c1260 union phy_configure_opts phy_opts = { in mtk_dp_phy_configure() local
1273 ret = phy_configure(mtk_dp->phy, &phy_opts); in mtk_dp_phy_configure()

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