Searched refs:phy_ref_clk (Results 1 – 6 of 6) sorted by relevance
| /drivers/net/ethernet/stmicro/stmmac/ |
| A D | dwmac-visconti.c | 51 struct clk *phy_ref_clk; member
195 dwmac->phy_ref_clk = devm_clk_get(&pdev->dev, "phy_ref_clk"); in visconti_eth_clock_probe()
196 if (IS_ERR(dwmac->phy_ref_clk)) in visconti_eth_clock_probe()
197 return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->phy_ref_clk), in visconti_eth_clock_probe()
200 err = clk_prepare_enable(dwmac->phy_ref_clk); in visconti_eth_clock_probe()
215 clk_disable_unprepare(dwmac->phy_ref_clk); in visconti_eth_clock_remove()
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| /drivers/phy/freescale/ |
| A D | phy-fsl-imx8qm-lvds-phy.c | 62 struct clk *phy_ref_clk; member
92 ret = clk_prepare_enable(priv->phy_ref_clk); in mixel_lvds_phy_power_on()
134 clk_disable_unprepare(priv->phy_ref_clk); in mixel_lvds_phy_power_on()
161 clk_disable_unprepare(priv->phy_ref_clk); in mixel_lvds_phy_power_off()
173 ret = clk_set_rate(priv->phy_ref_clk, cfg->differential_clk_rate); in mixel_lvds_phy_configure()
341 priv->phy_ref_clk = devm_clk_get(dev, NULL); in mixel_lvds_phy_probe()
342 if (IS_ERR(priv->phy_ref_clk)) in mixel_lvds_phy_probe()
343 return dev_err_probe(dev, PTR_ERR(priv->phy_ref_clk), in mixel_lvds_phy_probe()
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| A D | phy-fsl-imx8-mipi-dphy.c | 127 struct clk *phy_ref_clk; member
191 unsigned long ref_clk = clk_get_rate(priv->phy_ref_clk); in mixel_dphy_config_from_opts()
436 clk_set_rate(priv->phy_ref_clk, lvds_opts->differential_clk_rate); in mixel_dphy_configure_lvds_phy()
570 ret = clk_prepare_enable(priv->phy_ref_clk); in mixel_dphy_power_on()
590 clk_disable_unprepare(priv->phy_ref_clk); in mixel_dphy_power_on()
604 clk_disable_unprepare(priv->phy_ref_clk); in mixel_dphy_power_off()
692 priv->phy_ref_clk = devm_clk_get(&pdev->dev, "phy_ref"); in mixel_dphy_probe()
693 if (IS_ERR(priv->phy_ref_clk)) { in mixel_dphy_probe()
695 return PTR_ERR(priv->phy_ref_clk); in mixel_dphy_probe()
698 clk_get_rate(priv->phy_ref_clk)); in mixel_dphy_probe()
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| /drivers/phy/hisilicon/ |
| A D | phy-hi3670-pcie.c | 166 struct clk *phy_ref_clk; member
602 ret = clk_set_rate(phy->phy_ref_clk, REF_CLK_FREQ); in kirin_pcie_clk_ctrl()
606 ret = clk_prepare_enable(phy->phy_ref_clk); in kirin_pcie_clk_ctrl()
637 clk_disable_unprepare(phy->phy_ref_clk); in kirin_pcie_clk_ctrl()
769 phy->phy_ref_clk = devm_clk_get(dev, "phy_ref"); in hi3670_pcie_phy_get_resources()
770 if (IS_ERR(phy->phy_ref_clk)) in hi3670_pcie_phy_get_resources()
771 return PTR_ERR(phy->phy_ref_clk); in hi3670_pcie_phy_get_resources()
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| /drivers/pci/controller/dwc/ |
| A D | pcie-kirin.c | 131 struct clk *phy_ref_clk; member
153 phy->phy_ref_clk = devm_clk_get(dev, "pcie_phy_ref"); in hi3660_pcie_phy_get_clk()
154 if (IS_ERR(phy->phy_ref_clk)) in hi3660_pcie_phy_get_clk()
155 return PTR_ERR(phy->phy_ref_clk); in hi3660_pcie_phy_get_clk()
243 ret = clk_set_rate(phy->phy_ref_clk, REF_CLK_FREQ); in hi3660_pcie_phy_clk_ctrl()
247 ret = clk_prepare_enable(phy->phy_ref_clk); in hi3660_pcie_phy_clk_ctrl()
278 clk_disable_unprepare(phy->phy_ref_clk); in hi3660_pcie_phy_clk_ctrl()
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| /drivers/gpu/drm/bridge/ |
| A D | nwl-dsi.c | 95 struct clk *phy_ref_clk; member
856 phy_ref_rate = clk_get_rate(dsi->phy_ref_clk); in nwl_dsi_bridge_mode_set()
1013 dsi->phy_ref_clk = clk; in nwl_dsi_parse_dt()
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