| /drivers/net/mdio/ |
| A D | mdio-mux-bcm-iproc.c | 104 u16 phyid, u32 reg, u16 val, u32 op) in start_miim_ops() argument
115 param |= phyid << MDIO_PARAM_PHY_ID; in start_miim_ops()
136 static int iproc_mdiomux_read_c22(struct mii_bus *bus, int phyid, int reg) in iproc_mdiomux_read_c22() argument
141 ret = start_miim_ops(md->base, false, phyid, reg, 0, MDIO_CTRL_READ_OP); in iproc_mdiomux_read_c22()
148 static int iproc_mdiomux_read_c45(struct mii_bus *bus, int phyid, int devad, in iproc_mdiomux_read_c45() argument
154 ret = start_miim_ops(md->base, true, phyid, reg | devad << 16, 0, in iproc_mdiomux_read_c45()
163 int phyid, int reg, u16 val) in iproc_mdiomux_write_c22() argument
169 ret = start_miim_ops(md->base, false, phyid, reg, val, in iproc_mdiomux_write_c22()
178 int phyid, int devad, int reg, u16 val) in iproc_mdiomux_write_c45() argument
184 ret = start_miim_ops(md->base, true, phyid, reg | devad << 16, val, in iproc_mdiomux_write_c45()
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| /drivers/net/ethernet/hisilicon/hns3/hns3pf/ |
| A D | hclge_mdio.c | 33 u8 phyid; member
42 static int hclge_mdio_write(struct mii_bus *bus, int phyid, int regnum, in hclge_mdio_write() argument
57 hnae3_set_field(mdio_cmd->phyid, HCLGE_MDIO_PHYID_M, in hclge_mdio_write()
58 HCLGE_MDIO_PHYID_S, (u32)phyid); in hclge_mdio_write()
81 static int hclge_mdio_read(struct mii_bus *bus, int phyid, int regnum) in hclge_mdio_read() argument
95 hnae3_set_field(mdio_cmd->phyid, HCLGE_MDIO_PHYID_M, in hclge_mdio_read()
96 HCLGE_MDIO_PHYID_S, (u32)phyid); in hclge_mdio_read()
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| /drivers/net/ethernet/8390/ |
| A D | pcnet_cs.c | 888 u_int tmp, phyid; in mii_phy_probe() local
895 phyid = tmp << 16; in mii_phy_probe()
896 phyid |= mdio_read(mii_addr, i, MII_PHYID_REG2); in mii_phy_probe()
897 phyid &= MII_PHYID_REV_MASK; in mii_phy_probe()
898 netdev_dbg(dev, "MII at %d is 0x%08x\n", i, phyid); in mii_phy_probe()
899 if (phyid == AM79C9XX_HOME_PHY) { in mii_phy_probe()
901 } else if (phyid != AM79C9XX_ETH_PHY) { in mii_phy_probe()
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| /drivers/gpu/drm/amd/display/dc/bios/ |
| A D | command_table2.c | 273 ps.param.phyid = cmd->phy_id_to_atom(cntl->transmitter); in transmitter_control_v1_6()
355 dig_v1_7.phyid = cmd->phy_id_to_atom(cntl->transmitter); in transmitter_control_v1_7()
381 struct dc_link *link = get_link_by_phy_id(bp->base.ctx->dc, dig_v1_7.phyid); in transmitter_control_v1_7()
393 process_phy_transition_init_params.phy_id = dig_v1_7.phyid; in transmitter_control_v1_7()
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| /drivers/net/usb/ |
| A D | sr9800.c | 735 u32 phyid; in sr9800_bind() local
802 phyid = sr_get_phyid(dev); in sr9800_bind()
803 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid); in sr9800_bind()
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| A D | asix_devices.c | 1059 u32 phyid; in ax88178_reset() local
1105 phyid = asix_get_phyid(dev); in ax88178_reset()
1106 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid); in ax88178_reset()
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| /drivers/net/ethernet/socionext/ |
| A D | sni_ave.c | 492 static int ave_mdiobus_read(struct mii_bus *bus, int phyid, int regnum) in ave_mdiobus_read() argument
502 writel((phyid << 8) | regnum, priv->base + AVE_MDIOAR); in ave_mdiobus_read()
513 phyid, regnum); in ave_mdiobus_read()
520 static int ave_mdiobus_write(struct mii_bus *bus, int phyid, int regnum, in ave_mdiobus_write() argument
531 writel((phyid << 8) | regnum, priv->base + AVE_MDIOAR); in ave_mdiobus_write()
545 phyid, regnum); in ave_mdiobus_write()
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| /drivers/scsi/pm8001/ |
| A D | pm80xx_hwi.h | 537 __le32 phyid; member
548 __le32 phyid; member
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| A D | pm80xx_hwi.c | 3392 le32_to_cpu(pPayload->phyid) & 0xFF; in mpi_phy_start_resp()
3686 u32 phyid = in mpi_phy_stop_resp() local
3687 le32_to_cpu(pPayload->phyid) & 0xFF; in mpi_phy_stop_resp()
3688 struct pm8001_phy *phy = &pm8001_ha->phy[phyid]; in mpi_phy_stop_resp()
3691 pm8001_dbg(pm8001_ha, MSG, "phy:0x%x status:0x%x tag 0x%x\n", phyid, in mpi_phy_stop_resp()
4898 u32 operation, u32 phyid, in mpi_set_phy_profile_req() argument
4915 cpu_to_le32(((operation & 0xF) << 8) | (phyid & 0xFF)); in mpi_set_phy_profile_req()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| A D | dcn201_resource.c | 392 #define link_regs(id, phyid)\ argument
395 UNIPHY_DCN2_REG_LIST(phyid) \
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| /drivers/net/ethernet/ti/ |
| A D | cpsw.c | 1359 u32 phyid; in cpsw_probe_dt() local
1368 phyid = be32_to_cpup(parp+1); in cpsw_probe_dt()
1377 PHY_ID_FMT, mdio->name, phyid); in cpsw_probe_dt()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn302/ |
| A D | dcn302_resource.c | 841 #define link_regs(id, phyid)\ argument
844 UNIPHY_DCN2_REG_LIST(phyid), \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn303/ |
| A D | dcn303_resource.c | 797 #define link_regs(id, phyid)\ argument
800 UNIPHY_DCN2_REG_LIST(phyid), \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| A D | dcn21_resource.c | 1203 #define link_regs(id, phyid)\ argument
1206 UNIPHY_DCN2_REG_LIST(phyid), \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| A D | dcn301_resource.c | 352 #define link_regs(id, phyid)\ argument
355 UNIPHY_DCN2_REG_LIST(phyid), \
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| /drivers/scsi/aic94xx/ |
| A D | aic94xx_reg_def.h | 46 #define LmBLKRST_COMBIST(phyid) (1 << (24 + phyid)) argument
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| /drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.h | 345 #define UNIPHY_DCN2_REG_LIST_RI(id, phyid) \ argument
346 SRI_ARR_ALPHABET(CLOCK_ENABLE, SYMCLK, id, phyid), \
347 SRI_ARR_ALPHABET(CHANNEL_XBAR_CNTL, UNIPHY, id, phyid)
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| /drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| A D | dcn316_resource.c | 390 #define link_regs(id, phyid)\ argument
393 UNIPHY_DCN2_REG_LIST(phyid), \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| A D | dcn314_resource.c | 408 #define link_regs(id, phyid)\ argument
411 UNIPHY_DCN2_REG_LIST(phyid), \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| A D | dcn31_resource.c | 400 #define link_regs(id, phyid)\ argument
403 UNIPHY_DCN2_REG_LIST(phyid), \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| A D | dcn321_resource.c | 315 #define link_regs_init(id, phyid)\ argument
318 UNIPHY_DCN2_REG_LIST_RI(id, phyid)\
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| /drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| A D | dcn35_resource.c | 337 #define link_regs_init(id, phyid)\ argument
340 UNIPHY_DCN2_REG_LIST_RI(id, phyid)\
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| /drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| A D | dcn315_resource.c | 402 #define link_regs(id, phyid)\ argument
405 UNIPHY_DCN2_REG_LIST(phyid), \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| A D | dcn351_resource.c | 317 #define link_regs_init(id, phyid)\ argument
320 UNIPHY_DCN2_REG_LIST_RI(id, phyid)\
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| /drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| A D | dcn36_resource.c | 322 #define link_regs_init(id, phyid)\ argument
325 UNIPHY_DCN2_REG_LIST_RI(id, phyid)\
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