| /drivers/gpu/drm/i915/display/ |
| A D | intel_crtc_state_dump.c | 209 pipe_config->pipe_bpp, pipe_config->dither); in intel_crtc_state_dump() 257 pipe_config->has_audio, pipe_config->has_infoframe, in intel_crtc_state_dump() 300 pipe_config->vrr.vmin, pipe_config->vrr.vmax, pipe_config->vrr.flipline, in intel_crtc_state_dump() 302 pipe_config->vrr.vsync_start, pipe_config->vrr.vsync_end); in intel_crtc_state_dump() 321 pipe_config->linetime, pipe_config->ips_linetime); in intel_crtc_state_dump() 342 pipe_config->ips_enabled, pipe_config->double_wide, in intel_crtc_state_dump() 349 pipe_config->cgm_mode, pipe_config->gamma_mode, in intel_crtc_state_dump() 350 pipe_config->gamma_enable, pipe_config->csc_enable); in intel_crtc_state_dump() 353 pipe_config->csc_mode, pipe_config->gamma_mode, in intel_crtc_state_dump() 354 pipe_config->gamma_enable, pipe_config->csc_enable); in intel_crtc_state_dump() [all …]
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| A D | g4x_hdmi.c | 176 pipe_config->has_hdmi_sink = true; in intel_hdmi_get_config() 178 pipe_config->infoframes.enable |= in intel_hdmi_get_config() 181 if (pipe_config->infoframes.enable) in intel_hdmi_get_config() 182 pipe_config->has_infoframe = true; in intel_hdmi_get_config() 185 pipe_config->has_audio = true; in intel_hdmi_get_config() 198 if (pipe_config->pixel_multiplier) in intel_hdmi_get_config() 203 pipe_config->lane_count = 4; in intel_hdmi_get_config() 306 if (pipe_config->pipe_bpp > 24 && in ibx_enable_hdmi() 348 if (pipe_config->pipe_bpp > 24) { in cpt_enable_hdmi() 359 if (pipe_config->pipe_bpp > 24) { in cpt_enable_hdmi() [all …]
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| A D | g4x_dp.c | 85 pipe_config->dpll = divisor[i]; in g4x_dp_set_clock() 86 pipe_config->clock_set = true; in g4x_dp_set_clock() 103 pipe_config->port_clock, in intel_dp_prepare() 104 pipe_config->lane_count); in intel_dp_prepare() 149 pipe_config->enhanced_framing ? in intel_dp_prepare() 161 if (pipe_config->enhanced_framing) in intel_dp_prepare() 206 pipe_config->port_clock); in ilk_edp_pll_on() 392 g4x_dp_get_m_n(pipe_config); in intel_dp_get_config() 396 pipe_config->port_clock = 162000; in intel_dp_get_config() 398 pipe_config->port_clock = 270000; in intel_dp_get_config() [all …]
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| A D | intel_dp_mst.c | 642 &pipe_config->hw.adjusted_mode; in mst_stream_compute_config() 648 if (pipe_config->fec_enable && in mst_stream_compute_config() 695 pipe_config, true, in mst_stream_compute_config() 718 pipe_config->dp_m_n.tu); in mst_stream_compute_config() 724 pipe_config->limited_color_range = in mst_stream_compute_config() 728 pipe_config->lane_lat_optim_mask = in mst_stream_compute_config() 744 pipe_config); in mst_stream_compute_config() 1150 pipe_config, NULL); in mst_stream_pre_pll_enable() 1222 pipe_config, NULL); in mst_stream_pre_enable() 1302 &pipe_config->hw.adjusted_mode; in mst_stream_enable() [all …]
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| A D | intel_dp.c | 2004 pipe_config, in dsc_compute_link_config() 2194 pipe_config, in dsc_compute_compressed_bpp() 2436 else if (pipe_config->joiner_pipes || pipe_config->dsc.slice_count > 1) in intel_dp_dsc_compute_config() 2667 pipe_config, in intel_dp_compute_link_config() 2701 pipe_config->lane_count, pipe_config->port_clock, in intel_dp_compute_link_config() 3012 pipe_config->dp_m2_n2.data_m *= pipe_config->splitter.link_count; in intel_dp_drrs_compute_config() 3082 pipe_config->has_audio = in intel_dp_audio_compute_config() 3086 pipe_config->sdp_split_enable = pipe_config->has_audio && in intel_dp_audio_compute_config() 3245 pipe_config->mst_master_transcoder = pipe_config->cpu_transcoder; in intel_dp_compute_config() 3295 pipe_config->dp_m_n.data_m *= pipe_config->splitter.link_count; in intel_dp_compute_config() [all …]
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| A D | intel_dvo.c | 162 struct intel_crtc_state *pipe_config) in intel_dvo_get_config() argument 168 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO); in intel_dvo_get_config() 180 pipe_config->hw.adjusted_mode.flags |= flags; in intel_dvo_get_config() 182 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_dvo_get_config() 202 const struct intel_crtc_state *pipe_config, in intel_enable_dvo() argument 210 &pipe_config->hw.mode, in intel_enable_dvo() 211 &pipe_config->hw.adjusted_mode); in intel_enable_dvo() 255 struct intel_crtc_state *pipe_config, in intel_dvo_compute_config() argument 281 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dvo_compute_config() 282 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dvo_compute_config() [all …]
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| A D | icl_dsi.c | 308 &pipe_config->hw.adjusted_mode; in configure_dual_link_mode() 1205 gen11_dsi_map_pll(encoder, pipe_config); in gen11_dsi_pre_enable() 1478 struct intel_crtc_state *pipe_config) in gen11_dsi_get_timings() argument 1482 &pipe_config->hw.adjusted_mode; in gen11_dsi_get_timings() 1484 if (pipe_config->dsc.compressed_bpp_x16) { in gen11_dsi_get_timings() 1544 struct intel_crtc_state *pipe_config) in gen11_dsi_get_config() argument 1646 &pipe_config->hw.adjusted_mode; in gen11_dsi_compute_config() 1669 pipe_config->pipe_bpp = 24; in gen11_dsi_compute_config() 1671 pipe_config->pipe_bpp = 18; in gen11_dsi_compute_config() 1673 pipe_config->clock_set = true; in gen11_dsi_compute_config() [all …]
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| A D | intel_display.c | 3036 pipe_config->sink_format = pipe_config->output_format; in i9xx_get_pipe_config() 3111 pipe_config->port_clock / pipe_config->pixel_multiplier; in i9xx_get_pipe_config() 3379 pipe_config->pipe_bpp = 18; in ilk_get_pipe_config() 3382 pipe_config->pipe_bpp = 24; in ilk_get_pipe_config() 3385 pipe_config->pipe_bpp = 30; in ilk_get_pipe_config() 3388 pipe_config->pipe_bpp = 36; in ilk_get_pipe_config() 3407 pipe_config->sink_format = pipe_config->output_format; in ilk_get_pipe_config() 3971 pipe_config->sink_format = pipe_config->output_format; in hsw_get_pipe_config() 3978 pipe_config->ips_linetime = in hsw_get_pipe_config() 4060 else if (pipe_config->has_hdmi_sink && pipe_config->pipe_bpp > 24) in intel_crtc_dotclock() [all …]
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| A D | vlv_dsi.c | 299 pipe_config->pipe_bpp = 24; in intel_dsi_compute_config() 301 pipe_config->pipe_bpp = 18; in intel_dsi_compute_config() 305 pipe_config->mode_flags |= in intel_dsi_compute_config() 323 pipe_config->clock_set = true; in intel_dsi_compute_config() 747 bxt_dsi_pll_enable(encoder, pipe_config); in intel_dsi_pre_enable() 769 intel_dsi_prepare(encoder, pipe_config); in intel_dsi_pre_enable() 789 intel_dsi_prepare(encoder, pipe_config); in intel_dsi_pre_enable() 1015 &pipe_config->hw.adjusted_mode; in bxt_dsi_get_pipe_config() 1046 pipe_config->mode_flags |= in bxt_dsi_get_pipe_config() 1176 struct intel_crtc_state *pipe_config) in intel_dsi_get_config() argument [all …]
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| A D | intel_fdi.c | 198 if (pipe_config->fdi_lanes > 4) { in ilk_check_fdi_lanes() 206 if (pipe_config->fdi_lanes > 2) { in ilk_check_fdi_lanes() 209 pipe_config->fdi_lanes); in ilk_check_fdi_lanes() 224 if (pipe_config->fdi_lanes <= 2) in ilk_check_fdi_lanes() 241 if (pipe_config->fdi_lanes > 2) { in ilk_check_fdi_lanes() 287 const struct intel_crtc_state *pipe_config) in intel_fdi_link_freq() argument 290 return pipe_config->port_clock; /* SPLL */ in intel_fdi_link_freq() 324 struct intel_crtc_state *pipe_config) in ilk_fdi_compute_config() argument 342 pipe_config->pipe_bpp); in ilk_fdi_compute_config() 344 pipe_config->fdi_lanes = lane; in ilk_fdi_compute_config() [all …]
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| A D | intel_dp.h | 73 struct intel_crtc_state *pipe_config, 76 struct intel_crtc_state *pipe_config, 81 struct intel_crtc_state *pipe_config, 146 int intel_dp_dsc_sink_min_compressed_bpp(const struct intel_crtc_state *pipe_config); 148 const struct intel_crtc_state *pipe_config, 165 const struct intel_crtc_state *pipe_config); 171 const struct intel_crtc_state *pipe_config);
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| A D | intel_pipe_crc.c | 285 struct intel_crtc_state *pipe_config; in intel_crtc_crc_setup_workarounds() local 305 pipe_config = intel_atomic_get_crtc_state(state, crtc); in intel_crtc_crc_setup_workarounds() 306 if (IS_ERR(pipe_config)) { in intel_crtc_crc_setup_workarounds() 307 ret = PTR_ERR(pipe_config); in intel_crtc_crc_setup_workarounds() 311 pipe_config->uapi.mode_changed = pipe_config->has_psr; in intel_crtc_crc_setup_workarounds() 312 pipe_config->crc_enabled = enable; in intel_crtc_crc_setup_workarounds() 315 pipe_config->hw.active && crtc->pipe == PIPE_A && in intel_crtc_crc_setup_workarounds() 316 pipe_config->cpu_transcoder == TRANSCODER_EDP) in intel_crtc_crc_setup_workarounds() 317 pipe_config->uapi.mode_changed = true; in intel_crtc_crc_setup_workarounds()
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| A D | intel_vdsc.c | 243 if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_RGB || in intel_dsc_slice_dimensions_valid() 244 pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) { in intel_dsc_slice_dimensions_valid() 272 int intel_dsc_compute_params(struct intel_crtc_state *pipe_config) in intel_dsc_compute_params() argument 274 struct intel_display *display = to_intel_display(pipe_config); in intel_dsc_compute_params() 275 struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config; in intel_dsc_compute_params() 282 pipe_config->dsc.slice_count); in intel_dsc_compute_params() 284 err = intel_dsc_slice_dimensions_valid(pipe_config, vdsc_cfg); in intel_dsc_compute_params() 296 pipe_config->output_format != INTEL_OUTPUT_FORMAT_YCBCR444; in intel_dsc_compute_params() 299 pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) in intel_dsc_compute_params() 307 vdsc_cfg->bits_per_pixel = pipe_config->dsc.compressed_bpp_x16; in intel_dsc_compute_params() [all …]
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| A D | intel_ddi.c | 409 if (pipe_config->has_pch_encoder) in ddi_dotclock_get() 413 intel_crtc_dotclock(pipe_config); in ddi_dotclock_get() 2509 if (!pipe_config->splitter.enable) in intel_ddi_mso_get_config() 4117 pipe_config->pipe_bpp = 18; in intel_ddi_read_func_ctl() 4120 pipe_config->pipe_bpp = 24; in intel_ddi_read_func_ctl() 4123 pipe_config->pipe_bpp = 30; in intel_ddi_read_func_ctl() 4126 pipe_config->pipe_bpp = 36; in intel_ddi_read_func_ctl() 4177 pipe_config->has_audio = in intel_ddi_get_config() 4183 ddi_dotclock_get(pipe_config); in intel_ddi_get_config() 4444 pipe_config->has_hdmi_sink = in intel_ddi_compute_config() [all …]
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| A D | intel_tv.c | 929 const struct intel_crtc_state *pipe_config, in intel_enable_tv() argument 1092 struct intel_crtc_state *pipe_config) in intel_tv_get_config() argument 1096 &pipe_config->hw.adjusted_mode; in intel_tv_get_config() 1126 tv_mode.clock = pipe_config->port_clock; in intel_tv_get_config() 1169 pipe_config->mode_flags |= in intel_tv_get_config() 1191 struct intel_crtc_state *pipe_config, in intel_tv_compute_config() argument 1202 &pipe_config->hw.adjusted_mode; in intel_tv_compute_config() 1217 pipe_config->pipe_bpp = 8*3; in intel_tv_compute_config() 1219 pipe_config->port_clock = tv_mode->clock; in intel_tv_compute_config() 1225 pipe_config->clock_set = true; in intel_tv_compute_config() [all …]
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| A D | intel_sdvo.c | 1310 pipe_config->clock_set = true; in i9xx_adjust_sdvo_tv_clock() 1376 pipe_config->pipe_bpp = 8*3; in intel_sdvo_compute_config() 1396 pipe_config->sdvo_tv_clock = true; in intel_sdvo_compute_config() 1425 pipe_config->pixel_multiplier = in intel_sdvo_compute_config() 1430 pipe_config->has_audio = in intel_sdvo_compute_config() 1434 pipe_config->limited_color_range = in intel_sdvo_compute_config() 1746 pipe_config->pixel_multiplier = in intel_sdvo_get_config() 1751 dotclock = pipe_config->port_clock; in intel_sdvo_get_config() 1753 if (pipe_config->pixel_multiplier) in intel_sdvo_get_config() 1788 pipe_config->has_audio = true; in intel_sdvo_get_config() [all …]
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| A D | intel_hdmi.c | 263 const struct intel_crtc_state *pipe_config) in g4x_infoframes_enabled() argument 2338 if (pipe_config->has_hdmi_sink) in intel_hdmi_compute_config() 2339 pipe_config->has_infoframe = true; in intel_hdmi_compute_config() 2342 pipe_config->pixel_multiplier = 2; in intel_hdmi_compute_config() 2344 pipe_config->has_audio = in intel_hdmi_compute_config() 2362 if (intel_hdmi_is_ycbcr420(pipe_config)) { in intel_hdmi_compute_config() 2368 pipe_config->limited_color_range = in intel_hdmi_compute_config() 2375 pipe_config->lane_count = 4; in intel_hdmi_compute_config() 2379 pipe_config->hdmi_scrambling = true; in intel_hdmi_compute_config() 2381 if (pipe_config->port_clock > 340000) { in intel_hdmi_compute_config() [all …]
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| A D | intel_lspcon.h | 22 const struct intel_crtc_state *pipe_config); 38 const struct intel_crtc_state *pipe_config);
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| A D | intel_fdi.h | 22 const struct intel_crtc_state *pipe_config); 25 struct intel_crtc_state *pipe_config);
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| A D | intel_lspcon.c | 636 const struct intel_crtc_state *pipe_config) in lspcon_infoframes_enabled() argument 655 HSW_TVIDEO_DIP_CTL(display, pipe_config->cpu_transcoder)); in lspcon_infoframes_enabled() 711 const struct intel_crtc_state *pipe_config) in intel_lspcon_infoframes_enabled() argument 715 return dig_port->infoframes_enabled(encoder, pipe_config); in intel_lspcon_infoframes_enabled()
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| A D | intel_dp_test.h | 17 struct intel_crtc_state *pipe_config,
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| A D | intel_vdsc.h | 22 int intel_dsc_compute_params(struct intel_crtc_state *pipe_config);
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| A D | intel_hdcp.h | 33 const struct intel_crtc_state *pipe_config,
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| /drivers/gpu/drm/amd/display/dc/ |
| A D | dc_dmub_srv.c | 602 pipe_data->pipe_config.vblank_data.drr_info.drr_in_use = true; in populate_subvp_cmd_drr_info() 688 pipe_data->pipe_config.vblank_data.vblank_end = in populate_subvp_cmd_vblank_pipe_info() 747 pipe_data->pipe_config.subvp_data.prefetch_to_mall_start_lines = in update_subvp_prefetch_end_to_mall_start() 755 pipe_data->pipe_config.subvp_data.prefetch_to_mall_start_lines = in update_subvp_prefetch_end_to_mall_start() 798 pipe_data->pipe_config.subvp_data.main_vblank_start = in populate_subvp_cmd_pipe_info() 800 pipe_data->pipe_config.subvp_data.main_vblank_end = in populate_subvp_cmd_pipe_info() 818 pipe_data->pipe_config.subvp_data.scale_factor_numerator = out_num; in populate_subvp_cmd_pipe_info() 822 pipe_data->pipe_config.subvp_data.prefetch_lines = in populate_subvp_cmd_pipe_info() 826 pipe_data->pipe_config.subvp_data.prefetch_to_mall_start_lines = in populate_subvp_cmd_pipe_info() 829 pipe_data->pipe_config.subvp_data.processing_delay_lines = in populate_subvp_cmd_pipe_info() [all …]
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| /drivers/usb/renesas_usbhs/ |
| A D | pipe.c | 477 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhsp_setup_pipebuff() local 489 buff_size = pipe_config->bufsize; in usbhsp_setup_pipebuff() 490 bufnmb = pipe_config->bufnum; in usbhsp_setup_pipebuff() 507 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhs_pipe_config_update() local 509 u16 dblb = pipe_config->double_buf ? DBLB : 0; in usbhs_pipe_config_update()
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