| /drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/ |
| A D | dml2_top_soc15.c | 399 unsigned int pipe_index; in find_shift_for_valid_cache_id_assignment() local
416 for (pipe_index = 0; pipe_index < pipe_count; pipe_index++) { in find_shift_for_valid_cache_id_assignment()
418 pipe_vp_startx[pipe_index], pipe_vp_endx[pipe_index], 0, 0)) { in find_shift_for_valid_cache_id_assignment()
1021 int config_index, pipe_index; in dml2_top_soc15_build_mcache_programming() local
1028 …for (pipe_index = 0; pipe_index < params->mcache_configurations[config_index].num_pipes; pipe_inde… in dml2_top_soc15_build_mcache_programming()
1032 reset_mcache_allocations(params->per_plane_pipe_mcache_regs[config_index][pipe_index]); in dml2_top_soc15_build_mcache_programming()
1047 params->per_plane_pipe_mcache_regs[config_index][pipe_index]->main.p0.mcache_id_first = in dml2_top_soc15_build_mcache_programming()
1050 params->per_plane_pipe_mcache_regs[config_index][pipe_index]->mall.p0.mcache_id_first = in dml2_top_soc15_build_mcache_programming()
1056 params->per_plane_pipe_mcache_regs[config_index][pipe_index]->main.p0.split_location = in dml2_top_soc15_build_mcache_programming()
1061 params->per_plane_pipe_mcache_regs[config_index][pipe_index]->mall.p0.split_location = in dml2_top_soc15_build_mcache_programming()
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| A D | dml2_core_dcn4_calcs.h | 23 …internal_display_mode_lib *mode_lib, struct dml2_dchub_per_pipe_register_set *out, int pipe_index);
24 …core_internal_display_mode_lib *mode_lib, struct dml2_per_stream_programming *out, int pipe_index);
25 …core_internal_display_mode_lib *mode_lib, union dml2_global_sync_programming *out, int pipe_index);
30 …llocation(struct dml2_core_internal_display_mode_lib *mode_lib, unsigned int *out, int pipe_index);
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| A D | dml2_core_dcn4_calcs.c | 12700 struct dml2_dchub_per_pipe_register_set *out, int pipe_index) in dml2_core_calcs_get_pipe_regs() argument
12702 rq_dlg_get_rq_reg(&out->rq_regs, display_cfg, mode_lib, pipe_index); in dml2_core_calcs_get_pipe_regs()
12703 …get_dlg_reg(&mode_lib->scratch, &out->dlg_regs, &out->ttu_regs, display_cfg, mode_lib, pipe_index); in dml2_core_calcs_get_pipe_regs()
12704 …out->det_size = dml_get_det_buffer_size_kbytes(mode_lib, pipe_index) / mode_lib->ip.config_return_… in dml2_core_calcs_get_pipe_regs()
12709 out->dcn4x.vready_offset_pixels = dml_get_vready_offset(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12710 out->dcn4x.vstartup_lines = dml_get_vstartup_calculated(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12711 out->dcn4x.vupdate_offset_pixels = dml_get_vupdate_offset(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12712 out->dcn4x.vupdate_vupdate_width_pixels = dml_get_vupdate_width(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12713 out->dcn4x.pstate_keepout_start_lines = dml_get_pstate_keepout_dst_lines(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12718 dml2_core_calcs_get_global_sync_programming(mode_lib, &out->global_sync, pipe_index); in dml2_core_calcs_get_stream_programming()
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| /drivers/media/platform/renesas/vsp1/ |
| A D | vsp1_drm.c | 654 int vsp1_du_setup_lif(struct device *dev, unsigned int pipe_index, in vsp1_du_setup_lif() argument
664 if (pipe_index >= vsp1->info->lif_count) in vsp1_du_setup_lif()
667 drm_pipe = &vsp1->drm->pipe[pipe_index]; in vsp1_du_setup_lif()
732 __func__, pipe_index, cfg->width, cfg->height, in vsp1_du_setup_lif()
761 vsp1_write(vsp1, VI6_DISP_IRQ_STA(pipe_index), 0); in vsp1_du_setup_lif()
762 vsp1_write(vsp1, VI6_DISP_IRQ_ENB(pipe_index), 0); in vsp1_du_setup_lif()
789 void vsp1_du_atomic_begin(struct device *dev, unsigned int pipe_index) in vsp1_du_atomic_begin() argument
824 int vsp1_du_atomic_update(struct device *dev, unsigned int pipe_index, in vsp1_du_atomic_update() argument
829 struct vsp1_drm_pipeline *drm_pipe = &vsp1->drm->pipe[pipe_index]; in vsp1_du_atomic_update()
897 void vsp1_du_atomic_flush(struct device *dev, unsigned int pipe_index, in vsp1_du_atomic_flush() argument
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| A D | vsp1_video.h | 42 unsigned int pipe_index; member
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| A D | vsp1_video.c | 254 pipe->buffers_ready |= 1 << video->pipe_index; in vsp1_video_frame_end()
484 rwpf->video->pipe_index = ++pipe->num_inputs; in vsp1_video_pipeline_build()
490 rwpf->video->pipe_index = 0; in vsp1_video_pipeline_build()
678 pipe->buffers_ready |= 1 << video->pipe_index; in vsp1_video_buffer_queue()
865 pipe->buffers_ready &= ~(1 << video->pipe_index); in vsp1_video_stop_streaming()
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| /drivers/gpu/drm/renesas/rz-du/ |
| A D | rzg2l_du_vsp.h | 64 unsigned int pipe_index);
76 unsigned int pipe_index) in rzg2l_du_vsp_get_drm_plane() argument
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| A D | rzg2l_du_vsp.c | 74 unsigned int pipe_index) in rzg2l_du_vsp_get_drm_plane() argument
82 if (vsp_plane->index == pipe_index) in rzg2l_du_vsp_get_drm_plane()
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| /drivers/gpu/drm/ |
| A D | drm_vblank.c | 1742 unsigned int pipe_index; in drm_wait_vblank_ioctl() local
1765 pipe_index = high_pipe >> _DRM_VBLANK_HIGH_CRTC_SHIFT; in drm_wait_vblank_ioctl()
1767 pipe_index = flags & _DRM_VBLANK_SECONDARY ? 1 : 0; in drm_wait_vblank_ioctl()
1774 if (pipe_index == 0) in drm_wait_vblank_ioctl()
1776 pipe_index--; in drm_wait_vblank_ioctl()
1781 pipe = pipe_index; in drm_wait_vblank_ioctl()
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| /drivers/staging/media/atomisp/pci/ |
| A D | atomisp_compat_css20.c | 432 int pipe_index = 0, i; in __create_stream() local
437 multi_pipes[pipe_index++] = stream_env->pipes[i]; in __create_stream()
439 if (pipe_index == 0) in __create_stream()
450 pipe_index, multi_pipes, &stream_env->stream) != 0) in __create_stream()
2286 int pipe_index = atomisp_get_pipe_index(asd); in atomisp_get_css_frame_info() local
2290 stream_index = (pipe_index == IA_CSS_PIPE_ID_YUVPP) ? in atomisp_get_css_frame_info()
2295 .pipes[pipe_index], &info)) { in atomisp_get_css_frame_info()
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| /drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | dml2_translation_helper.c | 1195 unsigned int pipe_index = 0; in dml2_populate_pipe_to_plane_index_mapping() local
1211 pipe_index = pipe->pipe_idx; in dml2_populate_pipe_to_plane_index_mapping()
1213 …if (pipe->stream && dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] == false… in dml2_populate_pipe_to_plane_index_mapping()
1214 dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index[pipe_index] = plane_index; in dml2_populate_pipe_to_plane_index_mapping()
1216 dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] = true; in dml2_populate_pipe_to_plane_index_mapping()
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| /drivers/gpu/drm/amd/display/dc/ |
| A D | dc_dmub_srv.c | 427 fams_pipe_data->pipe_index[pipe_idx++] = head_pipe->plane_res.hubp->inst; in dc_dmub_srv_populate_fams_pipe_info()
432 fams_pipe_data->pipe_index[pipe_idx++] = split_pipe->plane_res.hubp->inst; in dc_dmub_srv_populate_fams_pipe_info()
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| /drivers/gpu/drm/amd/display/dmub/inc/ |
| A D | dmub_cmd.h | 5564 uint8_t pipe_index[4]; member
|