| /drivers/gpu/drm/i915/display/ |
| A D | intel_display_trace.h | 91 __entry->pipe_name = pipe_name(crtc->pipe);
121 __entry->pipe_name = pipe_name(crtc->pipe);
141 __entry->pipe_name = pipe_name(crtc->pipe);
165 __entry->pipe_name = pipe_name(crtc->pipe);
193 __entry->pipe_name = pipe_name(pipe);
218 __entry->pipe_name = pipe_name(pipe);
285 __entry->pipe_name = pipe_name(crtc->pipe);
332 __entry->pipe_name = pipe_name(crtc->pipe);
369 __entry->pipe_name = pipe_name(crtc->pipe);
399 __entry->pipe_name = pipe_name(crtc->pipe);
[all …]
|
| A D | intel_fifo_underrun.c | 110 drm_err(display->drm, "pipe %c underrun\n", pipe_name(crtc->pipe)); in i9xx_check_fifo_underruns()
130 pipe_name(pipe)); in i9xx_set_fifo_underrun_reporting()
161 drm_err(display->drm, "fifo underrun on pipe %c\n", pipe_name(pipe)); in ivb_check_fifo_underruns()
183 pipe_name(pipe)); in ivb_set_fifo_underrun_reporting()
227 pipe_name(pch_transcoder)); in cpt_check_pch_fifo_underruns()
249 pipe_name(pch_transcoder)); in cpt_set_fifo_underrun_reporting()
381 drm_err(display->drm, "CPU pipe %c FIFO underrun\n", pipe_name(pipe)); in intel_cpu_fifo_underrun_irq_handler()
403 pipe_name(pch_transcoder)); in intel_pch_fifo_underrun_irq_handler()
|
| A D | intel_pch_display.c | 53 port_name(port), pipe_name(pipe)); in assert_pch_dp_disabled()
72 port_name(port), pipe_name(pipe)); in assert_pch_hdmi_disabled()
92 pipe_name(pipe)); in assert_pch_ports_disabled()
97 pipe_name(pipe)); in assert_pch_ports_disabled()
115 pipe_name(pipe)); in assert_pch_transcoder_disabled()
310 pipe_name(pipe)); in ilk_enable_pch_transcoder()
331 pipe_name(pipe)); in ilk_disable_pch_transcoder()
|
| A D | intel_modeset_verify.c | 157 pipe_name(pipe)); in verify_encoder_state()
211 pipe_name(pipe)); in verify_crtc_state()
|
| A D | intel_vblank.c | 344 pipe_name(pipe)); in i915_get_crtc_scanoutpos()
500 pipe_name(pipe), str_on_off(state)); in wait_for_pipe_scanline_moving()
729 pipe_name(crtc->pipe)); in intel_vblank_evade()
|
| A D | intel_crtc.c | 376 funcs, "pipe %c", pipe_name(pipe)); in intel_crtc_init()
606 pipe_name(crtc->pipe), in dbg_vblank_evade()
738 pipe_name(pipe), crtc->debug.start_vbl_count, in intel_pipe_update_end()
|
| A D | intel_vga.c | 65 pipe_name(pipe)); in intel_vga_disable()
|
| A D | intel_fdi.c | 197 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
201 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
236 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
244 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
|
| A D | intel_modeset_setup.c | 594 pipe_name(crtc->pipe)); in intel_sanitize_encoder()
678 str_enabled_disabled(visible), pipe_name(pipe)); in readout_plane_state()
768 pipe_name(pipe)); in intel_modeset_readout_hw_state()
|
| A D | intel_display_irq.c | 317 pipe_name(pipe), enable_mask, status_mask); in i915_pipestat_enable_mask()
331 pipe_name(pipe), status_mask); in i915_enable_pipestat()
355 pipe_name(pipe), status_mask); in i915_disable_pipestat()
686 pipe_name(pipe), in ibx_irq_handler()
817 pipe_name(pipe), in cpt_irq_handler()
1432 pipe_name(pipe)); in gen8_de_irq_handler()
|
| A D | intel_pps.c | 142 pipe_name(pipe)); in vlv_power_sequencer_kick()
1206 pipe_name(pipe), encoder->base.base.id, in vlv_steal_power_sequencer()
1214 pipe_name(pipe), encoder->base.base.id, in vlv_steal_power_sequencer()
1889 pipe_name(pipe)); in assert_pps_unlocked()
|
| A D | intel_display_debugfs.c | 665 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); in i915_ddb_info()
785 pipe_name(crtc->pipe)); in i915_fifo_underrun_reset_write()
1239 seq_printf(m, "%c\n", pipe_name(crtc->pipe)); in intel_crtc_pipe_show()
|
| A D | intel_display.h | 49 #define pipe_name(p) ((p) + 'A') macro
|
| A D | intel_dpll_mgr.c | 4661 pll->info->name, pipe_name(crtc->pipe), pll->active_mask); in verify_single_dpll_state()
4665 pll->info->name, pipe_name(crtc->pipe), pll->active_mask); in verify_single_dpll_state()
4705 pll->info->name, pipe_name(crtc->pipe), pll->active_mask); in intel_dpll_state_verify()
4712 pll->info->name, pipe_name(crtc->pipe), pll->state.pipe_mask); in intel_dpll_state_verify()
|
| A D | intel_backlight.c | 807 drm_dbg_kms(display->drm, "pipe %c\n", pipe_name(pipe)); in intel_backlight_enable()
1422 connector->base.base.id, connector->base.name, pipe_name(pipe)); in vlv_setup_backlight()
|
| A D | intel_cursor.c | 1073 "cursor %c", pipe_name(pipe)); in intel_cursor_plane_create()
|
| A D | i9xx_plane.c | 1082 "primary %c", pipe_name(pipe)); in intel_primary_plane_create()
|
| A D | intel_display.c | 490 drm_dbg_kms(display->drm, "enabling pipe %c\n", pipe_name(pipe)); in intel_enable_transcoder()
569 drm_dbg_kms(display->drm, "disabling pipe %c\n", pipe_name(pipe)); in intel_disable_transcoder()
818 num_encoders, pipe_name(primary_crtc->pipe)); in intel_get_crtc_new_encoder()
8231 pipe_name(pipe), clock.vco, clock.dot); in i830_enable_pipe()
8297 pipe_name(pipe)); in i830_disable_pipe()
|
| A D | intel_bw.c | 1665 pipe_name(crtc->pipe), in intel_bw_crtc_update()
|
| A D | intel_dp_mst.c | 1810 DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe)); in mst_stream_encoder_create()
|
| A D | vlv_dsi.c | 1315 drm_dbg_kms(display->drm, "pipe %c\n", pipe_name(crtc->pipe)); in intel_dsi_prepare()
|
| A D | intel_display_power.c | 1207 pipe_name(crtc->pipe)); in assert_can_disable_lcpll()
|
| A D | i9xx_wm.c | 3834 pipe_name(pipe), in g4x_wm_get_hw_state()
3988 pipe_name(pipe), in vlv_wm_get_hw_state()
|
| A D | skl_universal_plane.c | 2952 pipe_name(pipe)); in skl_universal_plane_create()
|
| A D | intel_cdclk.c | 3334 pipe_name(pipe)); in intel_modeset_calc_cdclk()
|