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Searched refs:pipe_src (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_mode_lib.c165 display_pipe_source_params_st *pipe_src; in dml_log_pipe_params() local
174 pipe_src = &(pipes[i].pipe.src); in dml_log_pipe_params()
184 dml_print("DML PARAMS: dcc = %d\n", pipe_src->dcc); in dml_log_pipe_params()
185 dml_print("DML PARAMS: dcc_rate = %d\n", pipe_src->dcc_rate); in dml_log_pipe_params()
187 dml_print("DML PARAMS: vm = %d\n", pipe_src->vm); in dml_log_pipe_params()
188 dml_print("DML PARAMS: gpuvm = %d\n", pipe_src->gpuvm); in dml_log_pipe_params()
189 dml_print("DML PARAMS: hostvm = %d\n", pipe_src->hostvm); in dml_log_pipe_params()
193 dml_print("DML PARAMS: sw_mode = %d\n", pipe_src->sw_mode); in dml_log_pipe_params()
206 dml_print("DML PARAMS: cur0_bpp = %d\n", pipe_src->cur0_bpp); in dml_log_pipe_params()
208 dml_print("DML PARAMS: cur1_bpp = %d\n", pipe_src->cur1_bpp); in dml_log_pipe_params()
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/drivers/gpu/drm/i915/display/
A Dintel_pfit.c73 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in intel_pch_pfit_check_src_size()
74 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in intel_pch_pfit_check_src_size()
112 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in intel_pch_pfit_check_scaling()
113 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in intel_pch_pfit_check_scaling()
190 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in pch_panel_fitting()
191 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in pch_panel_fitting()
346 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in i965_scale_aspect()
347 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in i965_scale_aspect()
367 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in i9xx_scale_aspect()
368 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in i9xx_scale_aspect()
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A Dskl_scaler.c150 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in skl_update_scaler()
151 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in skl_update_scaler()
266 drm_rect_width(&crtc_state->pipe_src), in skl_update_scaler_crtc()
267 drm_rect_height(&crtc_state->pipe_src), in skl_update_scaler_crtc()
456 drm_rect_width(&crtc_state->pipe_src) << 16, in intel_atomic_setup_scaler()
457 drm_rect_height(&crtc_state->pipe_src) << 16); in intel_atomic_setup_scaler()
751 drm_rect_width(&crtc_state->pipe_src) << 16, in skl_pfit_enable()
752 drm_rect_height(&crtc_state->pipe_src) << 16); in skl_pfit_enable()
A Dintel_cursor.c174 -crtc_state->pipe_src.x1, in intel_check_cursor()
175 -crtc_state->pipe_src.y1); in intel_check_cursor()
562 int et_y_position = drm_rect_height(&crtc_state->pipe_src) + 1; in wa_16021440873()
A Dintel_psr.c2543 struct drm_rect *pipe_src) in clip_area_update() argument
2545 if (!drm_rect_intersect(damage_area, pipe_src)) in clip_area_update()
2614 &crtc_state->pipe_src); in intel_psr2_sel_fetch_et_alignment()
2723 crtc_state->psr2_su_area.x2 = drm_rect_width(&crtc_state->pipe_src); in intel_psr2_sel_fetch_update()
2761 &crtc_state->pipe_src); in intel_psr2_sel_fetch_update()
2768 &crtc_state->pipe_src); in intel_psr2_sel_fetch_update()
2776 &crtc_state->pipe_src); in intel_psr2_sel_fetch_update()
2792 clip_area_update(&crtc_state->psr2_su_area, &damaged_area, &crtc_state->pipe_src); in intel_psr2_sel_fetch_update()
A Dintel_display.c2198 drm_rect_width(&crtc_state->pipe_src) << 16, in ilk_pipe_pixel_rate()
2332 width = drm_rect_width(&crtc_state->pipe_src); in intel_joiner_compute_pipe_src()
2333 height = drm_rect_height(&crtc_state->pipe_src); in intel_joiner_compute_pipe_src()
2335 drm_rect_init(&crtc_state->pipe_src, 0, 0, in intel_joiner_compute_pipe_src()
2352 if (drm_rect_width(&crtc_state->pipe_src) & 1) { in intel_crtc_compute_pipe_src()
2806 int width = drm_rect_width(&crtc_state->pipe_src); in intel_set_pipe_src_size()
2900 width = drm_rect_width(&crtc_state->pipe_src); in intel_joiner_adjust_pipe_src()
2902 drm_rect_translate_to(&crtc_state->pipe_src, in intel_joiner_adjust_pipe_src()
2914 drm_rect_init(&pipe_config->pipe_src, 0, 0, in intel_get_pipe_src_size()
4659 drm_rect_init(&crtc_state->pipe_src, 0, 0, in intel_modeset_pipe_config()
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A Dintel_crtc_state_dump.c317 pipe_config->port_clock, DRM_RECT_ARG(&pipe_config->pipe_src), in intel_crtc_state_dump()
A Dintel_overlay.c986 if (!drm_rect_intersect(&clipped, &crtc_state->pipe_src)) in check_overlay_dst()
1182 if (drm_rect_width(&crtc->config->pipe_src) > 1024 && in intel_overlay_put_image_ioctl()
A Dintel_display_types.h1018 struct drm_rect pipe_src; member
A Dintel_display_debugfs.c560 DRM_RECT_ARG(&crtc_state->pipe_src), in intel_crtc_info()
A Dintel_plane.c1002 const struct drm_rect *clip = &crtc_state->pipe_src; in intel_plane_check_clipping()
A Dskl_universal_plane.c1821 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in skl_plane_check_dst_coordinates()

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