Searched refs:pipe_wm (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/i915/display/ |
| A D | skl_watermark.h | 53 const struct skl_wm_level *skl_plane_wm_level(const struct skl_pipe_wm *pipe_wm,
56 const struct skl_wm_level *skl_plane_trans_wm(const struct skl_pipe_wm *pipe_wm,
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| A D | i9xx_wm.c | 2890 struct intel_pipe_wm *pipe_wm) in ilk_validate_pipe_wm() argument
2895 .sprites_enabled = pipe_wm->sprites_enabled, in ilk_validate_pipe_wm()
2896 .sprites_scaled = pipe_wm->sprites_scaled, in ilk_validate_pipe_wm()
2919 struct intel_pipe_wm *pipe_wm; in ilk_compute_pipe_wm() local
2928 pipe_wm = &crtc_state->wm.ilk.optimal; in ilk_compute_pipe_wm()
2939 pipe_wm->pipe_enabled = crtc_state->hw.active; in ilk_compute_pipe_wm()
2950 if (pipe_wm->sprites_scaled) in ilk_compute_pipe_wm()
2953 memset(&pipe_wm->wm, 0, sizeof(pipe_wm->wm)); in ilk_compute_pipe_wm()
2957 if (!ilk_validate_pipe_wm(display, pipe_wm)) in ilk_compute_pipe_wm()
2963 struct intel_wm_level *wm = &pipe_wm->wm[level]; in ilk_compute_pipe_wm()
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| A D | intel_cursor.c | 633 const struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal; in skl_write_cursor_wm() local
640 skl_cursor_wm_reg_val(skl_plane_wm_level(pipe_wm, plane_id, level))); in skl_write_cursor_wm()
643 skl_cursor_wm_reg_val(skl_plane_trans_wm(pipe_wm, plane_id))); in skl_write_cursor_wm()
646 const struct skl_plane_wm *wm = &pipe_wm->planes[plane_id]; in skl_write_cursor_wm()
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| A D | skl_watermark.c | 1307 skl_plane_wm_level(const struct skl_pipe_wm *pipe_wm, in skl_plane_wm_level() argument
1311 const struct skl_plane_wm *wm = &pipe_wm->planes[plane_id]; in skl_plane_wm_level()
1313 if (level == 0 && pipe_wm->use_sagv_wm) in skl_plane_wm_level()
1320 skl_plane_trans_wm(const struct skl_pipe_wm *pipe_wm, in skl_plane_trans_wm() argument
1323 const struct skl_plane_wm *wm = &pipe_wm->planes[plane_id]; in skl_plane_trans_wm()
1325 if (pipe_wm->use_sagv_wm) in skl_plane_trans_wm()
2960 struct skl_pipe_wm *pipe_wm = &new_crtc_state->wm.skl.optimal; in skl_compute_wm() local
2979 pipe_wm->use_sagv_wm = !HAS_HW_SAGV_WM(display) && in skl_compute_wm()
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| A D | skl_universal_plane.c | 833 const struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal; in skl_write_plane_wm() local
845 skl_plane_wm_reg_val(skl_plane_wm_level(pipe_wm, plane_id, level))); in skl_write_plane_wm()
848 skl_plane_wm_reg_val(skl_plane_trans_wm(pipe_wm, plane_id))); in skl_write_plane_wm()
851 const struct skl_plane_wm *wm = &pipe_wm->planes[plane_id]; in skl_write_plane_wm()
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