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Searched refs:pixel_rate (Results 1 – 25 of 75) sorted by relevance

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/drivers/media/i2c/
A Dlt6911uxe.c95 struct v4l2_ctrl *pixel_rate; member
115 s64 pixel_rate; in get_pixel_rate() local
122 return pixel_rate; in get_pixel_rate()
309 s64 pixel_rate; in lt6911uxe_init_controls() local
317 pixel_rate = get_pixel_rate(lt6911uxe); in lt6911uxe_init_controls()
320 pixel_rate, pixel_rate, 1, in lt6911uxe_init_controls()
321 pixel_rate); in lt6911uxe_init_controls()
391 u64 pixel_rate; in lt6911uxe_set_format() local
398 pixel_rate = get_pixel_rate(lt6911uxe); in lt6911uxe_set_format()
399 __v4l2_ctrl_modify_range(lt6911uxe->pixel_rate, pixel_rate, in lt6911uxe_set_format()
[all …]
A Dov5647.c92 u64 pixel_rate; member
108 struct v4l2_ctrl *pixel_rate; member
522 .pixel_rate = 87500000,
543 .pixel_rate = 81666700,
564 .pixel_rate = 81666700,
585 .pixel_rate = 55000000,
1013 __v4l2_ctrl_modify_range(sensor->pixel_rate, mode->pixel_rate, in ov5647_set_pad_fmt()
1014 mode->pixel_rate, 1, mode->pixel_rate); in ov5647_set_pad_fmt()
1319 sensor->mode->pixel_rate, in ov5647_init_controls()
1320 sensor->mode->pixel_rate, 1, in ov5647_init_controls()
[all …]
A Dimx319.c120 struct v4l2_ctrl *pixel_rate; member
2041 u64 pixel_rate; in imx319_set_pad_format() local
2062 pixel_rate = IMX319_LINK_FREQ_DEFAULT * 2 * 4; in imx319_set_pad_format()
2063 do_div(pixel_rate, 10); in imx319_set_pad_format()
2064 __v4l2_ctrl_s_ctrl_int64(imx319->pixel_rate, pixel_rate); in imx319_set_pad_format()
2240 u64 pixel_rate; in imx319_init_controls() local
2259 pixel_rate = IMX319_LINK_FREQ_DEFAULT * 2 * 4; in imx319_init_controls()
2260 do_div(pixel_rate, 10); in imx319_init_controls()
2262 imx319->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops, in imx319_init_controls()
2263 V4L2_CID_PIXEL_RATE, pixel_rate, in imx319_init_controls()
[all …]
A Dimx355.c106 struct v4l2_ctrl *pixel_rate; member
1339 u64 pixel_rate; in imx355_set_pad_format() local
1360 pixel_rate = IMX355_LINK_FREQ_DEFAULT * 2 * 4; in imx355_set_pad_format()
1361 do_div(pixel_rate, 10); in imx355_set_pad_format()
1362 __v4l2_ctrl_s_ctrl_int64(imx355->pixel_rate, pixel_rate); in imx355_set_pad_format()
1529 u64 pixel_rate; in imx355_init_controls() local
1548 pixel_rate = IMX355_LINK_FREQ_DEFAULT * 2 * 4; in imx355_init_controls()
1549 do_div(pixel_rate, 10); in imx355_init_controls()
1551 imx355->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx355_ctrl_ops, in imx355_init_controls()
1552 V4L2_CID_PIXEL_RATE, pixel_rate, in imx355_init_controls()
[all …]
A Dov9734.c330 struct v4l2_ctrl *pixel_rate; member
349 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV9734_DATA_LANES; in to_pixel_rate() local
351 do_div(pixel_rate, OV9734_RGB_DEPTH); in to_pixel_rate()
353 return pixel_rate; in to_pixel_rate()
541 s64 exposure_max, h_blank, pixel_rate; in ov9734_init_controls() local
560 pixel_rate = to_pixel_rate(OV9734_LINK_FREQ_180MHZ_INDEX); in ov9734_init_controls()
561 ov9734->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops, in ov9734_init_controls()
563 pixel_rate, 1, pixel_rate); in ov9734_init_controls()
704 __v4l2_ctrl_s_ctrl_int64(ov9734->pixel_rate, in ov9734_set_format()
A Dimx283.c632 const u32 pclk_pre = pixel_rate / HZ_PER_MHZ; in imx283_internal_clock()
641 static u64 imx283_iclk_to_pix(unsigned int pixel_rate, unsigned int cycles) in imx283_iclk_to_pix() argument
651 const u32 pclk_pre = pixel_rate / HZ_PER_MHZ; in imx283_iclk_to_pix()
758 u64 shr, pixel_rate; in imx283_set_ctrl() local
805 pixel_rate = imx283_pixel_rate(imx283, mode); in imx283_set_ctrl()
930 u64 pixel_rate = imx283_pixel_rate(imx283, mode); in imx283_set_framing_limits() local
934 imx283->hmax = imx283_internal_clock(pixel_rate, mode->default_hmax); in imx283_set_framing_limits()
1304 u64 pixel_rate; in imx283_init_controls() local
1318 pixel_rate = imx283_pixel_rate(imx283, mode); in imx283_init_controls()
1320 V4L2_CID_PIXEL_RATE, pixel_rate, in imx283_init_controls()
[all …]
A Dov02e10.c236 struct v4l2_ctrl *pixel_rate; member
262 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV02E10_DATA_LANES; in to_pixel_rate() local
264 do_div(pixel_rate, OV02E10_RGB_DEPTH); in to_pixel_rate()
266 return pixel_rate; in to_pixel_rate()
382 s64 exposure_max, h_blank, pixel_rate; in ov02e10_init_controls() local
395 pixel_rate = to_pixel_rate(ov02e10->link_freq_index); in ov02e10_init_controls()
396 ov02e10->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov02e10_ctrl_ops, in ov02e10_init_controls()
398 pixel_rate, 1, pixel_rate); in ov02e10_init_controls()
619 ret = __v4l2_ctrl_s_ctrl_int64(ov02e10->pixel_rate, in ov02e10_set_format()
A Dimx258.c657 struct v4l2_ctrl *pixel_rate; member
913 s64 pixel_rate; in imx258_set_pad_format() local
936 pixel_rate = link_freq_to_pixel_rate(link_freq, link_cfg); in imx258_set_pad_format()
937 __v4l2_ctrl_modify_range(imx258->pixel_rate, pixel_rate, in imx258_set_pad_format()
938 pixel_rate, 1, pixel_rate); in imx258_set_pad_format()
1227 s64 pixel_rate; in imx258_init_controls() local
1259 pixel_rate = link_freq_to_pixel_rate(imx258->link_freq_menu_items[0], in imx258_init_controls()
1263 imx258->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, in imx258_init_controls()
1265 pixel_rate, pixel_rate, in imx258_init_controls()
1266 1, pixel_rate); in imx258_init_controls()
A Dov2740.c528 struct v4l2_ctrl *pixel_rate; member
560 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV2740_DATA_LANES; in to_pixel_rate() local
562 do_div(pixel_rate, OV2740_RGB_DEPTH); in to_pixel_rate()
564 return pixel_rate; in to_pixel_rate()
769 s64 exposure_max, h_blank, pixel_rate; in ov2740_init_controls() local
788 pixel_rate = to_pixel_rate(ov2740->supported_modes->link_freq_index); in ov2740_init_controls()
789 ov2740->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov2740_ctrl_ops, in ov2740_init_controls()
791 pixel_rate, 1, pixel_rate); in ov2740_init_controls()
1052 __v4l2_ctrl_s_ctrl_int64(ov2740->pixel_rate, in ov2740_set_format()
A Dov08d10.c526 struct v4l2_ctrl *pixel_rate; member
638 u64 pixel_rate = link_freq_menu[f_index] * 2 * nlanes; in to_rate() local
640 do_div(pixel_rate, OV08D10_RGB_DEPTH); in to_rate()
642 return pixel_rate; in to_rate()
943 ov08d10->pixel_rate = in ov08d10_init_controls()
1138 s64 pixel_rate; in ov08d10_set_format() local
1153 pixel_rate = to_rate(ov08d10->priv_lane->link_freq_menu, in ov08d10_set_format()
1156 __v4l2_ctrl_s_ctrl_int64(ov08d10->pixel_rate, pixel_rate); in ov08d10_set_format()
A Dov5640.c391 enum ov5640_pixel_rate_id pixel_rate; member
409 struct v4l2_ctrl *pixel_rate; member
698 .pixel_rate = OV5640_PIXEL_RATE_48M,
743 .pixel_rate = OV5640_PIXEL_RATE_48M,
790 .pixel_rate = OV5640_PIXEL_RATE_48M,
833 .pixel_rate = OV5640_PIXEL_RATE_48M,
880 .pixel_rate = OV5640_PIXEL_RATE_96M,
924 .pixel_rate = OV5640_PIXEL_RATE_96M,
2872 u32 pixel_rate; in ov5640_update_pixel_rate() local
2918 pixel_rate /= 2; in ov5640_update_pixel_rate()
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A Dov02a10.c251 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV02A10_DATA_LANES; in to_pixel_rate() local
253 do_div(pixel_rate, OV02A10_BITS_PER_SAMPLE); in to_pixel_rate()
255 return pixel_rate; in to_pixel_rate()
743 s64 pixel_rate; in ov02a10_initialize_controls() local
760 pixel_rate = to_pixel_rate(0); in ov02a10_initialize_controls()
761 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE, 0, pixel_rate, 1, in ov02a10_initialize_controls()
762 pixel_rate); in ov02a10_initialize_controls()
A Dov02c10.c383 struct v4l2_ctrl *pixel_rate; member
486 s64 exposure_max, h_blank, pixel_rate; in ov02c10_init_controls() local
500 pixel_rate = div_u64(link_freq_menu_items[ov02c10->link_freq_index] * in ov02c10_init_controls()
503 ov02c10->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov02c10_ctrl_ops, in ov02c10_init_controls()
505 pixel_rate, 1, pixel_rate); in ov02c10_init_controls()
A Dov9282.c193 struct v4l2_ctrl *pixel_rate; member
560 s64 pixel_rate; in ov9282_update_controls() local
567 pixel_rate = (fmt->format.code == MEDIA_BUS_FMT_Y10_1X10) ? in ov9282_update_controls()
569 ret = __v4l2_ctrl_modify_range(ov9282->pixel_rate, pixel_rate, in ov9282_update_controls()
570 pixel_rate, 1, pixel_rate); in ov9282_update_controls()
1347 ov9282->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov9282_ctrl_ops, in ov9282_init_controls()
A Dimx219.c350 struct v4l2_ctrl *pixel_rate; member
563 imx219->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, in imx219_init_controls()
892 int pixel_rate; in imx219_set_pad_format() local
932 pixel_rate = imx219_get_pixel_rate(imx219) * in imx219_set_pad_format()
934 __v4l2_ctrl_modify_range(imx219->pixel_rate, pixel_rate, in imx219_set_pad_format()
935 pixel_rate, 1, pixel_rate); in imx219_set_pad_format()
A Dov13858.c1037 struct v4l2_ctrl *pixel_rate; member
1355 s64 pixel_rate; in ov13858_set_pad_format() local
1376 pixel_rate = link_freq_to_pixel_rate(link_freq); in ov13858_set_pad_format()
1377 __v4l2_ctrl_s_ctrl_int64(ov13858->pixel_rate, pixel_rate); in ov13858_set_pad_format()
1586 ov13858->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov13858_ctrl_ops, in ov13858_init_controls()
/drivers/gpu/drm/i915/display/
A Dintel_sprite.c240 unsigned int pixel_rate; in vlv_plane_min_cdclk() local
250 pixel_rate = crtc_state->pixel_rate; in vlv_plane_min_cdclk()
254 return DIV_ROUND_UP(pixel_rate * num, den); in vlv_plane_min_cdclk()
553 unsigned int pixel_rate; in ivb_plane_min_cdclk() local
563 pixel_rate = crtc_state->pixel_rate; in ivb_plane_min_cdclk()
567 return DIV_ROUND_UP(pixel_rate * num, den); in ivb_plane_min_cdclk()
573 unsigned int src_w, dst_w, pixel_rate; in ivb_sprite_min_cdclk() local
583 pixel_rate = crtc_state->pixel_rate; in ivb_sprite_min_cdclk()
636 unsigned int pixel_rate = crtc_state->pixel_rate; in hsw_plane_min_cdclk() local
925 unsigned int hscale, pixel_rate; in g4x_sprite_min_cdclk() local
[all …]
A Di9xx_wm.c481 ret = mul_u32_u32(pixel_rate, cpp * latency); in intel_wm_method1()
559 int pixel_rate, in intel_calculate_wm() argument
572 entries = intel_wm_method1(pixel_rate, cpp, in intel_calculate_wm()
662 int pixel_rate = crtc->config->pixel_rate; in pnv_update_wm() local
666 wm = intel_calculate_wm(display, pixel_rate, in pnv_update_wm()
988 pixel_rate = crtc_state->pixel_rate; in g4x_compute_wm()
1479 ret = intel_wm_method2(pixel_rate, htotal, in vlv_wm_method2()
1518 pixel_rate = crtc_state->pixel_rate; in vlv_compute_wm_level()
2140 int pixel_rate = crtc->config->pixel_rate; in i965_update_wm() local
2314 int pixel_rate = crtc->config->pixel_rate; in i9xx_update_wm() local
[all …]
A Dhsw_ips.c215 crtc_state->pixel_rate > display->cdclk.max_cdclk_freq * 95 / 100) in hsw_crtc_state_ips_capable()
232 return DIV_ROUND_UP(crtc_state->pixel_rate * 100, 95); in hsw_ips_min_cdclk()
268 if (crtc_state->pixel_rate > intel_cdclk_logical(cdclk_state) * 95 / 100) in hsw_ips_compute_config()
/drivers/staging/media/max96712/
A Dmax96712.c301 long pixel_rate; in max96712_v4l2_register() local
315 pixel_rate = priv->info->dpllfreq / priv->mipi.num_data_lanes * 1000000; in max96712_v4l2_register()
317 pixel_rate, pixel_rate, 1, pixel_rate); in max96712_v4l2_register()
/drivers/media/platform/sunxi/sun6i-mipi-csi2/
A Dsun6i_mipi_csi2.c183 unsigned long pixel_rate; in sun6i_mipi_csi2_s_stream() local
210 pixel_rate = (unsigned long)v4l2_ctrl_g_ctrl_int64(ctrl); in sun6i_mipi_csi2_s_stream()
211 if (!pixel_rate) { in sun6i_mipi_csi2_s_stream()
231 phy_mipi_dphy_get_default_config(pixel_rate, format->bpp, lanes_count, in sun6i_mipi_csi2_s_stream()
246 pixel_rate, format->bpp, lanes_count, in sun6i_mipi_csi2_s_stream()
/drivers/media/i2c/adv748x/
A Dadv748x-csi2.c293 if (!tx->pixel_rate) in adv748x_csi2_set_pixelrate()
296 return v4l2_ctrl_s_ctrl_int64(tx->pixel_rate, rate); in adv748x_csi2_set_pixelrate()
318 tx->pixel_rate = v4l2_ctrl_new_std(&tx->ctrl_hdl, in adv748x_csi2_init_controls()
/drivers/gpu/drm/vc4/
A Dvc4_kms.c1005 unsigned long pixel_rate; in vc4_core_clock_atomic_check() local
1054 pixel_rate = load_state->hvs_load; in vc4_core_clock_atomic_check()
1056 pixel_rate = (pixel_rate * 40) / 100; in vc4_core_clock_atomic_check()
1058 pixel_rate = (pixel_rate * 60) / 100; in vc4_core_clock_atomic_check()
1061 hvs_new_state->core_clock_rate = max(cob_rate, pixel_rate); in vc4_core_clock_atomic_check()
/drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/
A Dsun8i_a83t_mipi_csi2.c215 unsigned long pixel_rate; in sun8i_a83t_mipi_csi2_s_stream() local
242 pixel_rate = (unsigned long)v4l2_ctrl_g_ctrl_int64(ctrl); in sun8i_a83t_mipi_csi2_s_stream()
243 if (!pixel_rate) { in sun8i_a83t_mipi_csi2_s_stream()
263 phy_mipi_dphy_get_default_config(pixel_rate, format->bpp, lanes_count, in sun8i_a83t_mipi_csi2_s_stream()
278 pixel_rate, format->bpp, lanes_count, in sun8i_a83t_mipi_csi2_s_stream()
/drivers/media/i2c/et8ek8/
A Det8ek8_driver.c53 struct v4l2_ctrl *pixel_rate; member
703 sensor->pixel_rate = in et8ek8_init_controls()
726 u32 min, max, pixel_rate; in et8ek8_update_controls() local
739 pixel_rate = ((mode->pixel_clock + (1 << S) - 1) >> S) + mode->width; in et8ek8_update_controls()
740 pixel_rate = mode->window_width * (pixel_rate - 1) / mode->width; in et8ek8_update_controls()
743 __v4l2_ctrl_s_ctrl_int64(sensor->pixel_rate, pixel_rate << S); in et8ek8_update_controls()

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