Searched refs:plane_addr (Results 1 – 9 of 9) sorted by relevance
| /drivers/gpu/drm/msm/disp/dpu1/ |
| A D | dpu_formats.c | 312 layout->plane_addr[0] = base_addr + layout->plane_size[2]; in _dpu_format_populate_addrs_ubwc()
315 layout->plane_addr[1] = base_addr + layout->plane_size[0] in _dpu_format_populate_addrs_ubwc()
322 layout->plane_addr[2] = base_addr; in _dpu_format_populate_addrs_ubwc()
325 layout->plane_addr[3] = base_addr + layout->plane_size[0] in _dpu_format_populate_addrs_ubwc()
346 layout->plane_addr[0] = base_addr + layout->plane_size[2]; in _dpu_format_populate_addrs_ubwc()
347 layout->plane_addr[1] = 0; in _dpu_format_populate_addrs_ubwc()
352 layout->plane_addr[2] = base_addr; in _dpu_format_populate_addrs_ubwc()
353 layout->plane_addr[3] = 0; in _dpu_format_populate_addrs_ubwc()
364 layout->plane_addr[i] = msm_framebuffer_iova(fb, i); in _dpu_format_populate_addrs_linear()
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| A D | dpu_hw_wb.c | 60 DPU_REG_WRITE(c, WB_DST0_ADDR, data->dest.plane_addr[0]); in dpu_hw_wb_setup_outaddress()
61 DPU_REG_WRITE(c, WB_DST1_ADDR, data->dest.plane_addr[1]); in dpu_hw_wb_setup_outaddress()
62 DPU_REG_WRITE(c, WB_DST2_ADDR, data->dest.plane_addr[2]); in dpu_hw_wb_setup_outaddress()
63 DPU_REG_WRITE(c, WB_DST3_ADDR, data->dest.plane_addr[3]); in dpu_hw_wb_setup_outaddress()
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| A D | dpu_encoder_phys_wb.c | 602 swap(wb_cfg->dest.plane_addr[1], wb_cfg->dest.plane_addr[2]); in dpu_encoder_phys_wb_prepare_wb_job()
605 wb_cfg->dest.plane_addr[0], wb_cfg->dest.plane_addr[1], in dpu_encoder_phys_wb_prepare_wb_job()
606 wb_cfg->dest.plane_addr[2], wb_cfg->dest.plane_addr[3]); in dpu_encoder_phys_wb_prepare_wb_job()
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| A D | dpu_hw_sspp.c | 457 for (i = 0; i < ARRAY_SIZE(layout->plane_addr); i++) in dpu_hw_sspp_setup_sourceaddress()
459 layout->plane_addr[i]); in dpu_hw_sspp_setup_sourceaddress()
462 layout->plane_addr[0]); in dpu_hw_sspp_setup_sourceaddress()
464 layout->plane_addr[2]); in dpu_hw_sspp_setup_sourceaddress()
467 layout->plane_addr[0]); in dpu_hw_sspp_setup_sourceaddress()
469 layout->plane_addr[2]); in dpu_hw_sspp_setup_sourceaddress()
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| A D | dpu_hw_mdss.h | 319 uint32_t plane_addr[DPU_MAX_PLANES]; member
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| A D | dpu_trace.h | 796 __entry->layout.height, __entry->layout.plane_addr[0],
798 __entry->layout.plane_addr[1],
800 __entry->layout.plane_addr[2],
802 __entry->layout.plane_addr[3],
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| /drivers/media/platform/mediatek/jpeg/ |
| A D | mtk_jpeg_dec_hw.h | 66 dma_addr_t plane_addr[MTK_JPEG_COMP_MAX]; member
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| A D | mtk_jpeg_dec_hw.c | 470 mtk_jpeg_dec_set_dst_bank0(base, support_34bits, fb->plane_addr[0], in mtk_jpeg_dec_set_config()
471 fb->plane_addr[1], fb->plane_addr[2]); in mtk_jpeg_dec_set_config()
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| A D | mtk_jpeg_core.c | 928 fb->plane_addr[i] = vb2_dma_contig_plane_dma_addr(dst_buf, i); in mtk_jpeg_set_dec_dst()
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