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Searched refs:plane_interim_ddb (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dskl_watermark.c1433 memset(crtc_state->wm.skl.plane_interim_ddb, 0, in skl_crtc_allocate_plane_ddb()
1434 sizeof(crtc_state->wm.skl.plane_interim_ddb)); in skl_crtc_allocate_plane_ddb()
1509 &crtc_state->wm.skl.plane_interim_ddb[plane_id]; in skl_crtc_allocate_plane_ddb()
1575 &crtc_state->wm.skl.plane_interim_ddb[plane_id]; in skl_crtc_allocate_plane_ddb()
3091 &crtc_state->wm.skl.plane_interim_ddb[plane_id]; in skl_wm_get_hw_state()
3817 crtc_state->wm.skl.plane_interim_ddb[plane->id] = 0; in skl_wm_plane_disable_noatomic()
A Dintel_display_types.h897 u16 plane_interim_ddb[I915_MAX_PLANES]; member
A Dskl_universal_plane.c840 &crtc_state->wm.skl.plane_interim_ddb[plane_id]; in skl_write_plane_wm()

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