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Searched refs:pll_clk (Results 1 – 25 of 41) sorted by relevance

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/drivers/clk/axs10x/
A Dpll_clock.c223 pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL); in axs10x_pll_clk_probe()
224 if (!pll_clk) in axs10x_pll_clk_probe()
241 pll_clk->dev = dev; in axs10x_pll_clk_probe()
256 &pll_clk->hw); in axs10x_pll_clk_probe()
266 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in of_axs10x_pll_clk_setup()
267 if (!pll_clk) in of_axs10x_pll_clk_setup()
271 if (!pll_clk->base) { in of_axs10x_pll_clk_setup()
277 if (!pll_clk->lock) { in of_axs10x_pll_clk_setup()
307 iounmap(pll_clk->lock); in of_axs10x_pll_clk_setup()
309 iounmap(pll_clk->base); in of_axs10x_pll_clk_setup()
[all …]
A Di2s_pll_clock.c170 struct i2s_pll_clk *pll_clk; in i2s_pll_clk_probe() local
173 pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL); in i2s_pll_clk_probe()
174 if (!pll_clk) in i2s_pll_clk_probe()
177 pll_clk->base = devm_platform_ioremap_resource(pdev, 0); in i2s_pll_clk_probe()
178 if (IS_ERR(pll_clk->base)) in i2s_pll_clk_probe()
179 return PTR_ERR(pll_clk->base); in i2s_pll_clk_probe()
188 pll_clk->hw.init = &init; in i2s_pll_clk_probe()
189 pll_clk->dev = dev; in i2s_pll_clk_probe()
191 clk = devm_clk_register(dev, &pll_clk->hw); in i2s_pll_clk_probe()
/drivers/clk/socfpga/
A Dclk-pll-s10.c199 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in s10_register_pll()
200 if (WARN_ON(!pll_clk)) in s10_register_pll()
220 hw_clk = &pll_clk->hw.hw; in s10_register_pll()
224 kfree(pll_clk); in s10_register_pll()
239 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in agilex_register_pll()
240 if (WARN_ON(!pll_clk)) in agilex_register_pll()
259 hw_clk = &pll_clk->hw.hw; in agilex_register_pll()
263 kfree(pll_clk); in agilex_register_pll()
278 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in n5x_register_pll()
279 if (WARN_ON(!pll_clk)) in n5x_register_pll()
[all …]
A Dclk-pll-a10.c71 struct socfpga_pll *pll_clk; in __socfpga_pll_init() local
81 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in __socfpga_pll_init()
82 if (WARN_ON(!pll_clk)) in __socfpga_pll_init()
89 pll_clk->hw.reg = clk_mgr_a10_base_addr + reg; in __socfpga_pll_init()
102 pll_clk->hw.hw.init = &init; in __socfpga_pll_init()
104 pll_clk->hw.bit_idx = SOCFPGA_PLL_EXT_ENA; in __socfpga_pll_init()
105 hw_clk = &pll_clk->hw.hw; in __socfpga_pll_init()
125 kfree(pll_clk); in __socfpga_pll_init()
A Dclk-pll.c78 struct socfpga_pll *pll_clk; in __socfpga_pll_init() local
87 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in __socfpga_pll_init()
88 if (WARN_ON(!pll_clk)) in __socfpga_pll_init()
95 pll_clk->hw.reg = clk_mgr_base_addr + reg; in __socfpga_pll_init()
105 pll_clk->hw.hw.init = &init; in __socfpga_pll_init()
107 pll_clk->hw.bit_idx = SOCFPGA_PLL_EXT_ENA; in __socfpga_pll_init()
109 hw_clk = &pll_clk->hw.hw; in __socfpga_pll_init()
129 kfree(pll_clk); in __socfpga_pll_init()
/drivers/clk/
A Dclk-hsdk-pll.c312 pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL); in hsdk_pll_clk_probe()
313 if (!pll_clk) in hsdk_pll_clk_probe()
331 pll_clk->hw.init = &init; in hsdk_pll_clk_probe()
332 pll_clk->dev = dev; in hsdk_pll_clk_probe()
347 &pll_clk->hw); in hsdk_pll_clk_probe()
358 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in of_hsdk_pll_clk_setup()
359 if (!pll_clk) in of_hsdk_pll_clk_setup()
363 if (!pll_clk->regs) { in of_hsdk_pll_clk_setup()
385 pll_clk->hw.init = &init; in of_hsdk_pll_clk_setup()
405 iounmap(pll_clk->regs); in of_hsdk_pll_clk_setup()
[all …]
A Dclk-vt8500.c677 struct clk_pll *pll_clk; in vtwm_pll_clk_init() local
690 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in vtwm_pll_clk_init()
691 if (WARN_ON(!pll_clk)) in vtwm_pll_clk_init()
694 pll_clk->reg = pmc_base + reg; in vtwm_pll_clk_init()
695 pll_clk->lock = &_lock; in vtwm_pll_clk_init()
696 pll_clk->type = pll_type; in vtwm_pll_clk_init()
707 pll_clk->hw.init = &init; in vtwm_pll_clk_init()
709 hw = &pll_clk->hw; in vtwm_pll_clk_init()
710 rc = clk_hw_register(NULL, &pll_clk->hw); in vtwm_pll_clk_init()
712 kfree(pll_clk); in vtwm_pll_clk_init()
A Dclk-moxart.c59 struct clk *pll_clk; in moxart_of_apb_clk_init() local
81 pll_clk = of_clk_get(node, 0); in moxart_of_apb_clk_init()
82 if (IS_ERR(pll_clk)) { in moxart_of_apb_clk_init()
A Dclk-npcm8xx.c309 struct npcm8xx_clk_pll_data *pll_clk = &npcm8xx_pll_clks[i]; in npcm8xx_clk_probe() local
311 hw = npcm8xx_clk_register_pll(dev, clk_base + pll_clk->reg, in npcm8xx_clk_probe()
312 pll_clk->name, &pll_clk->parent, in npcm8xx_clk_probe()
313 pll_clk->flags); in npcm8xx_clk_probe()
316 pll_clk->hw = *hw; in npcm8xx_clk_probe()
A Dclk-asm9260.c260 const char *pll_clk = "pll"; in asm9260_acc_init() local
278 pll_hw = clk_hw_register_fixed_rate_parent_accuracy(NULL, pll_clk, &pll_parent_data, in asm9260_acc_init()
/drivers/clk/renesas/
A Drcar-gen4-cpg.c86 u32 cr0 = readl(pll_clk->pllcr0_reg); in cpg_pll_8_25_clk_recalc_rate()
105 u32 cr0 = readl(pll_clk->pllcr0_reg); in cpg_pll_8_25_clk_determine_rate()
139 u32 cr0 = readl(pll_clk->pllcr0_reg); in cpg_pll_8_25_clk_set_rate()
200 u32 cr0 = readl(pll_clk->pllcr0_reg); in cpg_pll_9_24_clk_recalc_rate()
234 struct cpg_pll_clk *pll_clk; in cpg_pll_clk_register() local
237 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in cpg_pll_clk_register()
238 if (!pll_clk) in cpg_pll_clk_register()
246 pll_clk->hw.init = &init; in cpg_pll_clk_register()
249 pll_clk->pllecr_reg = base + CPG_PLLECR; in cpg_pll_clk_register()
252 clk = clk_register(NULL, &pll_clk->hw); in cpg_pll_clk_register()
[all …]
A Drcar-gen3-cpg.c95 val = readl(pll_clk->pllcr_reg); in cpg_pll_clk_set_rate()
98 writel(val, pll_clk->pllcr_reg); in cpg_pll_clk_set_rate()
101 if (readl(pll_clk->pllecr_reg) & pll_clk->pllecr_pllst_mask) in cpg_pll_clk_set_rate()
124 struct cpg_pll_clk *pll_clk; in cpg_pll_clk_register() local
128 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in cpg_pll_clk_register()
129 if (!pll_clk) in cpg_pll_clk_register()
137 pll_clk->hw.init = &init; in cpg_pll_clk_register()
138 pll_clk->pllcr_reg = base + offset; in cpg_pll_clk_register()
139 pll_clk->pllecr_reg = base + CPG_PLLECR; in cpg_pll_clk_register()
143 clk = clk_register(NULL, &pll_clk->hw); in cpg_pll_clk_register()
[all …]
A Drzv2h-cpg.c105 struct pll_clk { struct
173 struct pll_clk *pll_clk = to_pll(hw); in rzv2h_cpg_pll_clk_is_enabled() local
184 struct pll_clk *pll_clk = to_pll(hw); in rzv2h_cpg_pll_clk_enable() local
222 struct pll_clk *pll_clk = to_pll(hw); in rzv2h_cpg_pll_clk_recalc_rate() local
255 struct pll_clk *pll_clk; in rzv2h_cpg_pll_clk_register() local
262 pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL); in rzv2h_cpg_pll_clk_register()
263 if (!pll_clk) in rzv2h_cpg_pll_clk_register()
273 pll_clk->hw.init = &init; in rzv2h_cpg_pll_clk_register()
274 pll_clk->pll = core->cfg.pll; in rzv2h_cpg_pll_clk_register()
275 pll_clk->priv = priv; in rzv2h_cpg_pll_clk_register()
[all …]
A Drzg2l-cpg.c956 struct pll_clk { struct
970 struct pll_clk *pll_clk = to_pll(hw); in rzg2l_cpg_pll_clk_recalc_rate() local
994 struct pll_clk *pll_clk = to_pll(hw); in rzg3s_cpg_pll_clk_recalc_rate() local
1038 struct pll_clk *pll_clk; in rzg2l_cpg_pll_clk_register() local
1045 pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL); in rzg2l_cpg_pll_clk_register()
1046 if (!pll_clk) in rzg2l_cpg_pll_clk_register()
1056 pll_clk->hw.init = &init; in rzg2l_cpg_pll_clk_register()
1057 pll_clk->conf = core->conf; in rzg2l_cpg_pll_clk_register()
1058 pll_clk->base = priv->base; in rzg2l_cpg_pll_clk_register()
1059 pll_clk->priv = priv; in rzg2l_cpg_pll_clk_register()
[all …]
/drivers/spi/
A Dspi-bcmbca-hsspi.c117 struct clk *pll_clk; member
439 struct clk *clk, *pll_clk = NULL; in bcmbca_hsspi_probe() local
467 if (IS_ERR(pll_clk)) { in bcmbca_hsspi_probe()
468 ret = PTR_ERR(pll_clk); in bcmbca_hsspi_probe()
472 ret = clk_prepare_enable(pll_clk); in bcmbca_hsspi_probe()
476 rate = clk_get_rate(pll_clk); in bcmbca_hsspi_probe()
492 bs->pll_clk = pll_clk; in bcmbca_hsspi_probe()
564 clk_disable_unprepare(pll_clk); in bcmbca_hsspi_probe()
577 clk_disable_unprepare(bs->pll_clk); in bcmbca_hsspi_remove()
589 clk_disable_unprepare(bs->pll_clk); in bcmbca_hsspi_suspend()
[all …]
A Dspi-bcm63xx-hsspi.c136 struct clk *pll_clk; member
730 struct clk *clk, *pll_clk = NULL; in bcm63xx_hsspi_probe() local
766 if (IS_ERR(pll_clk)) { in bcm63xx_hsspi_probe()
767 ret = PTR_ERR(pll_clk); in bcm63xx_hsspi_probe()
771 ret = clk_prepare_enable(pll_clk); in bcm63xx_hsspi_probe()
775 rate = clk_get_rate(pll_clk); in bcm63xx_hsspi_probe()
791 bs->pll_clk = pll_clk; in bcm63xx_hsspi_probe()
874 clk_disable_unprepare(pll_clk); in bcm63xx_hsspi_probe()
888 clk_disable_unprepare(bs->pll_clk); in bcm63xx_hsspi_remove()
900 clk_disable_unprepare(bs->pll_clk); in bcm63xx_hsspi_suspend()
[all …]
/drivers/clk/imx/
A Dclk-fracn-gppll.c359 const struct imx_fracn_gppll_clk *pll_clk, in _imx_clk_fracn_gppll() argument
372 init.flags = pll_clk->flags; in _imx_clk_fracn_gppll()
379 pll->rate_table = pll_clk->rate_table; in _imx_clk_fracn_gppll()
380 pll->rate_count = pll_clk->rate_count; in _imx_clk_fracn_gppll()
396 const struct imx_fracn_gppll_clk *pll_clk) in imx_clk_fracn_gppll() argument
398 return _imx_clk_fracn_gppll(name, parent_name, base, pll_clk, CLK_FRACN_GPPLL_FRACN); in imx_clk_fracn_gppll()
404 const struct imx_fracn_gppll_clk *pll_clk) in imx_clk_fracn_gppll_integer() argument
406 return _imx_clk_fracn_gppll(name, parent_name, base, pll_clk, CLK_FRACN_GPPLL_INTEGER); in imx_clk_fracn_gppll_integer()
A Dclk-pll14xx.c499 const struct imx_pll14xx_clk *pll_clk) in imx_dev_clk_hw_pll14xx() argument
512 init.flags = pll_clk->flags; in imx_dev_clk_hw_pll14xx()
516 switch (pll_clk->type) { in imx_dev_clk_hw_pll14xx()
518 if (!pll_clk->rate_table) in imx_dev_clk_hw_pll14xx()
534 pll->type = pll_clk->type; in imx_dev_clk_hw_pll14xx()
535 pll->rate_table = pll_clk->rate_table; in imx_dev_clk_hw_pll14xx()
536 pll->rate_count = pll_clk->rate_count; in imx_dev_clk_hw_pll14xx()
A Dclk.h96 const struct imx_fracn_gppll_clk *pll_clk);
99 const struct imx_fracn_gppll_clk *pll_clk);
224 #define imx_clk_hw_pll14xx(name, parent_name, base, pll_clk) \ argument
225 imx_dev_clk_hw_pll14xx(NULL, name, parent_name, base, pll_clk)
229 const struct imx_pll14xx_clk *pll_clk);
/drivers/clk/samsung/
A Dclk-pll.c1329 const struct samsung_pll_clock *pll_clk) in _samsung_clk_register_pll() argument
1338 __func__, pll_clk->name); in _samsung_clk_register_pll()
1342 init.name = pll_clk->name; in _samsung_clk_register_pll()
1343 init.flags = pll_clk->flags; in _samsung_clk_register_pll()
1344 init.parent_names = &pll_clk->parent_name; in _samsung_clk_register_pll()
1347 if (pll_clk->rate_table) { in _samsung_clk_register_pll()
1359 __func__, pll_clk->name); in _samsung_clk_register_pll()
1362 switch (pll_clk->type) { in _samsung_clk_register_pll()
1473 __func__, pll_clk->name); in _samsung_clk_register_pll()
1477 pll->type = pll_clk->type; in _samsung_clk_register_pll()
[all …]
/drivers/clk/ti/
A Dfapll.c490 struct clk *pll_clk) in ti_fapll_synth_setup() argument
515 synth->clk_pll = pll_clk; in ti_fapll_synth_setup()
537 struct clk *pll_clk; in ti_fapll_setup() local
593 pll_clk = clk_register(NULL, &fd->hw); in ti_fapll_setup()
594 if (IS_ERR(pll_clk)) in ti_fapll_setup()
597 fd->outputs.clks[0] = pll_clk; in ti_fapll_setup()
636 output_name, name, pll_clk); in ti_fapll_setup()
/drivers/clk/spear/
A Dclk-vco-pll.c276 spinlock_t *lock, struct clk **pll_clk, in clk_register_vco_pll() argument
343 if (pll_clk) in clk_register_vco_pll()
344 *pll_clk = tpll_clk; in clk_register_vco_pll()
A Dclk.h124 spinlock_t *lock, struct clk **pll_clk,
/drivers/clk/rockchip/
A Dclk-pll.c1062 struct clk *pll_clk, *mux_clk; in rockchip_clk_register_pll() local
1185 pll_clk = clk_register(NULL, &pll->hw); in rockchip_clk_register_pll()
1186 if (IS_ERR(pll_clk)) { in rockchip_clk_register_pll()
1188 __func__, name, PTR_ERR(pll_clk)); in rockchip_clk_register_pll()
1197 mux_clk = pll_clk; in rockchip_clk_register_pll()
/drivers/gpu/drm/bridge/
A Dsamsung-dsim.c628 if (dsi->pll_clk) { in samsung_dsim_set_pll()
634 fin = clk_get_rate(clk_get_parent(dsi->pll_clk)); in samsung_dsim_set_pll()
637 clk_set_rate(dsi->pll_clk, fin); in samsung_dsim_set_pll()
639 fin = clk_get_rate(dsi->pll_clk); in samsung_dsim_set_pll()
1861 dsi->pll_clk = devm_clk_get(dev, "sclk_mipi"); in samsung_dsim_parse_dt()
1862 if (IS_ERR(dsi->pll_clk)) in samsung_dsim_parse_dt()
1863 return PTR_ERR(dsi->pll_clk); in samsung_dsim_parse_dt()

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