Searched refs:pllctrl (Results 1 – 3 of 3) sorted by relevance
| /drivers/gpu/drm/sti/ |
| A D | sti_hdmi_tx3g4c28phy.c | 79 u32 val, tmdsck, idf, odf, pllctrl = 0; in sti_hdmi_tx3g4c28phy_start() local
103 pllctrl |= 40 << PLL_CFG_NDIV_SHIFT; in sti_hdmi_tx3g4c28phy_start()
110 pllctrl |= idf << PLL_CFG_IDF_SHIFT; in sti_hdmi_tx3g4c28phy_start()
111 pllctrl |= odf << PLL_CFG_ODF_SHIFT; in sti_hdmi_tx3g4c28phy_start()
117 DRM_DEBUG_DRIVER("pllctrl = 0x%x\n", pllctrl); in sti_hdmi_tx3g4c28phy_start()
118 hdmi_write(hdmi, (pllctrl | PLL_CFG_EN), HDMI_SRZ_PLL_CFG); in sti_hdmi_tx3g4c28phy_start()
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| /drivers/clk/keystone/ |
| A D | pll.c | 158 static void __init _of_pll_clk_init(struct device_node *node, bool pllctrl) in _of_pll_clk_init() argument
197 pll_data->has_pllctrl = pllctrl; in _of_pll_clk_init()
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| /drivers/gpu/drm/bridge/ |
| A D | tc358767.c | 581 static int tc_pllupdate(struct tc_data *tc, unsigned int pllctrl) in tc_pllupdate() argument
585 ret = regmap_write(tc->regmap, pllctrl, PLLUPDATE | PLLEN); in tc_pllupdate()
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