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Searched refs:prediv_value (Results 1 – 2 of 2) sorted by relevance

/drivers/clk/imx/
A Dclk-composite-8m.c33 unsigned int prediv_value; in imx8m_clk_composite_divider_recalc_rate() local
36 prediv_value = readl(divider->reg) >> divider->shift; in imx8m_clk_composite_divider_recalc_rate()
37 prediv_value &= clk_div_mask(divider->width); in imx8m_clk_composite_divider_recalc_rate()
82 int prediv_value; in imx8m_clk_composite_divider_set_rate() local
88 &prediv_value, &div_value); in imx8m_clk_composite_divider_set_rate()
98 val |= (u32)(prediv_value - 1) << divider->shift; in imx8m_clk_composite_divider_set_rate()
113 int prediv_value; in imx8m_divider_determine_rate() local
121 prediv_value = val >> divider->shift; in imx8m_divider_determine_rate()
122 prediv_value &= clk_div_mask(divider->width); in imx8m_divider_determine_rate()
123 prediv_value++; in imx8m_divider_determine_rate()
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/drivers/phy/mediatek/
A Dphy-mtk-hdmi-mt8195.c89 u8 prediv_value; in mtk_hdmi_pll_set_hw() local
185 prediv_value = ilog2(prediv); in mtk_hdmi_pll_set_hw()
187 mtk_phy_update_field(regs + HDMI_1_PLL_CFG_4, RG_HDMITXPLL_PREDIV, prediv_value); in mtk_hdmi_pll_set_hw()

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