| /drivers/gpu/drm/gma500/ |
| A D | intel_bios.c | 105 switch (edp_link_params->preemphasis) { in parse_edp()
107 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; in parse_edp()
110 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; in parse_edp()
113 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; in parse_edp()
116 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; in parse_edp()
134 dev_priv->edp.vswing, dev_priv->edp.preemphasis); in parse_edp()
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| A D | intel_bios.h | 455 u8 preemphasis:4; member
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| A D | psb_drv.h | 528 int preemphasis; member
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| /drivers/gpu/drm/tegra/ |
| A D | sor.c | 54 u8 preemphasis[4]; member
73 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
88 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
103 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
118 .preemphasis = { 0x00, 0x17, 0x17, 0x17 },
133 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
152 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
167 .preemphasis = { 0x01, 0x02, 0x02, 0x02 },
2529 settings->preemphasis[2] << 16 | in tegra_sor_hdmi_enable()
2530 settings->preemphasis[1] << 8 | in tegra_sor_hdmi_enable()
[all …]
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| /drivers/gpu/drm/vc4/ |
| A D | vc4_hdmi_phy.c | 285 u8 preemphasis; member
510 VC4_SET_FIELD(chan0_settings->amplitude.preemphasis, in vc5_hdmi_phy_init()
514 VC4_SET_FIELD(chan1_settings->amplitude.preemphasis, in vc5_hdmi_phy_init()
518 VC4_SET_FIELD(chan2_settings->amplitude.preemphasis, in vc5_hdmi_phy_init()
522 VC4_SET_FIELD(clock_settings->amplitude.preemphasis, in vc5_hdmi_phy_init()
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| /drivers/phy/qualcomm/ |
| A D | phy-qcom-qusb2.c | 423 struct override_param preemphasis; member
555 if (or->preemphasis.override) in qusb2_phy_override_phy_params()
557 or->preemphasis.value << PREEMPHASIS_EN_SHIFT, in qusb2_phy_override_phy_params()
1080 or->preemphasis.value = (u8)value; in qusb2_phy_probe()
1081 or->preemphasis.override = true; in qusb2_phy_probe()
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| /drivers/media/radio/si4713/ |
| A D | si4713.h | 246 u32 preemphasis; member
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| /drivers/gpu/drm/mediatek/ |
| A D | mtk_dp.c | 970 int swing_val, int preemphasis) in mtk_dp_set_swing_pre_emphasis() argument
976 swing_val, preemphasis); in mtk_dp_set_swing_pre_emphasis()
982 preemphasis << (DP_TX0_PRE_EMPH_SHIFT + lane_shift), in mtk_dp_set_swing_pre_emphasis()
1544 u8 preemphasis; in mtk_dp_train_update_swing_pre() local
1550 preemphasis = ((dpcd_adjust_req[index] >> shift) & in mtk_dp_train_update_swing_pre()
1554 preemphasis << DP_TRAIN_PRE_EMPHASIS_SHIFT; in mtk_dp_train_update_swing_pre()
1558 if (preemphasis == 3) in mtk_dp_train_update_swing_pre()
1561 mtk_dp_set_swing_pre_emphasis(mtk_dp, lane, swing, preemphasis); in mtk_dp_train_update_swing_pre()
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| /drivers/media/radio/ |
| A D | radio-wl1273.c | 47 unsigned int preemphasis; member
903 unsigned int preemphasis) in wl1273_fm_set_preemphasis() argument
915 switch (preemphasis) { in wl1273_fm_set_preemphasis()
934 radio->preemphasis = preemphasis; in wl1273_fm_set_preemphasis()
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| /drivers/net/ethernet/chelsio/cxgb3/ |
| A D | ael1002.c | 331 static const struct reg_val preemphasis[] = { in ael2005_setup_twinax_edc() local
340 err = set_phy_regs(phy, preemphasis); in ael2005_setup_twinax_edc()
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| /drivers/gpu/drm/i915/display/ |
| A D | intel_bios.c | 1486 switch (edp_link_params->preemphasis) { in parse_edp()
1488 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; in parse_edp()
1491 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; in parse_edp()
1494 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; in parse_edp()
1497 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; in parse_edp()
1502 edp_link_params->preemphasis); in parse_edp()
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| A D | intel_vbt_defs.h | 1047 u8 preemphasis:4; member
1057 u8 preemphasis:4; member
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| A D | intel_display_types.h | 342 int preemphasis; member
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| /drivers/gpu/drm/xlnx/ |
| A D | zynqmp_dp.c | 702 u8 preemphasis = in zynqmp_dp_adjust_train() local
708 if (preemphasis >= DP_TRAIN_PRE_EMPH_LEVEL_2) in zynqmp_dp_adjust_train()
709 preemphasis |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; in zynqmp_dp_adjust_train()
711 train_set[i] = voltage | preemphasis; in zynqmp_dp_adjust_train()
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| /drivers/net/ethernet/broadcom/bnxt/ |
| A D | bnxt.h | 1509 __le32 preemphasis; member
1656 u32 preemphasis; member
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| A D | bnxt.c | 12100 link_info->preemphasis = le32_to_cpu(resp->preemphasis); in bnxt_update_link()
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