Searched refs:provided_clocks (Results 1 – 7 of 7) sorted by relevance
| /drivers/gpu/drm/msm/dsi/phy/ |
| A D | dsi_phy_28nm_8960.c | 377 static int pll_28nm_register(struct dsi_pll_28nm *pll_28nm, struct clk_hw **provided_clocks) in pll_28nm_register() argument
427 provided_clocks[DSI_BYTE_PLL_CLK] = &bytediv->hw; in pll_28nm_register()
437 provided_clocks[DSI_PIXEL_PLL_CLK] = hw; in pll_28nm_register()
457 ret = pll_28nm_register(pll_28nm, phy->provided_clocks->hws); in dsi_pll_28nm_8960_init()
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| A D | dsi_phy.c | 641 phy->provided_clocks = devm_kzalloc(dev, in dsi_phy_driver_probe()
642 struct_size(phy->provided_clocks, hws, NUM_PROVIDED_CLKS), in dsi_phy_driver_probe()
644 if (!phy->provided_clocks) in dsi_phy_driver_probe()
647 phy->provided_clocks->num = NUM_PROVIDED_CLKS; in dsi_phy_driver_probe()
725 phy->provided_clocks); in dsi_phy_driver_probe()
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| A D | dsi_phy_10nm.c | 563 static int pll_10nm_register(struct dsi_pll_10nm *pll_10nm, struct clk_hw **provided_clocks) in pll_10nm_register() argument
623 provided_clocks[DSI_BYTE_PLL_CLK] = hw; in pll_10nm_register()
669 provided_clocks[DSI_PIXEL_PLL_CLK] = hw; in pll_10nm_register()
696 ret = pll_10nm_register(pll_10nm, phy->provided_clocks->hws); in dsi_pll_10nm_init()
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| A D | dsi_phy_28nm.c | 619 static int pll_28nm_register(struct dsi_pll_28nm *pll_28nm, struct clk_hw **provided_clocks) in pll_28nm_register() argument
671 provided_clocks[DSI_PIXEL_PLL_CLK] = hw; in pll_28nm_register()
688 provided_clocks[DSI_BYTE_PLL_CLK] = hw; in pll_28nm_register()
708 ret = pll_28nm_register(pll_28nm, phy->provided_clocks->hws); in dsi_pll_28nm_init()
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| A D | dsi_phy.h | 121 struct clk_hw_onecell_data *provided_clocks; member
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| A D | dsi_phy_14nm.c | 808 static int pll_14nm_register(struct dsi_pll_14nm *pll_14nm, struct clk_hw **provided_clocks) in pll_14nm_register() argument
849 provided_clocks[DSI_BYTE_PLL_CLK] = hw; in pll_14nm_register()
873 provided_clocks[DSI_PIXEL_PLL_CLK] = hw; in pll_14nm_register()
899 ret = pll_14nm_register(pll_14nm, phy->provided_clocks->hws); in dsi_pll_14nm_init()
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| A D | dsi_phy_7nm.c | 681 static int pll_7nm_register(struct dsi_pll_7nm *pll_7nm, struct clk_hw **provided_clocks) in pll_7nm_register() argument
742 provided_clocks[DSI_BYTE_PLL_CLK] = hw; in pll_7nm_register()
804 provided_clocks[DSI_PIXEL_PLL_CLK] = hw; in pll_7nm_register()
832 ret = pll_7nm_register(pll_7nm, phy->provided_clocks->hws); in dsi_pll_7nm_init()
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