Home
last modified time | relevance | path

Searched refs:psr_version (Results 1 – 25 of 30) sorted by relevance

12

/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_psr.c78 if (link->dpcd_caps.psr_info.psr_version == 0) { in amdgpu_dm_set_psr_caps()
79 link->psr_settings.psr_version = DC_PSR_VERSION_UNSUPPORTED; in amdgpu_dm_set_psr_caps()
84 link->psr_settings.psr_version = DC_PSR_VERSION_SU_1; in amdgpu_dm_set_psr_caps()
86 link->psr_settings.psr_version = DC_PSR_VERSION_1; in amdgpu_dm_set_psr_caps()
112 if (link->psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED) { in amdgpu_dm_link_setup_psr()
122 if (link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) { in amdgpu_dm_link_setup_psr()
184 if (link->psr_settings.psr_version < DC_PSR_VERSION_SU_1) in amdgpu_dm_psr_enable()
A Damdgpu_dm_debugfs.c1069 seq_printf(m, "Sink support: %s", str_yes_no(link->dpcd_caps.psr_info.psr_version != 0)); in psr_capability_show()
1070 if (link->dpcd_caps.psr_info.psr_version) in psr_capability_show()
1071 seq_printf(m, " [0x%02x]", link->dpcd_caps.psr_info.psr_version); in psr_capability_show()
1075 if (link->psr_settings.psr_version) in psr_capability_show()
1076 seq_printf(m, " [0x%02x]", link->psr_settings.psr_version); in psr_capability_show()
A Damdgpu_dm_crtc.c146 if (link->psr_settings.psr_version < DC_PSR_VERSION_SU_1 && is_sr_active) in amdgpu_dm_crtc_set_panel_sr_feature()
A Damdgpu_dm_crc.c512 if (stream_state->link->psr_settings.psr_version < DC_PSR_VERSION_SU_1) in amdgpu_dm_crtc_configure_crc_source()
A Damdgpu_dm.c5271 link->psr_settings.psr_version = DC_PSR_VERSION_UNSUPPORTED; in amdgpu_dm_initialize_drm_device()
5325 link->psr_settings.psr_version, in amdgpu_dm_initialize_drm_device()
5326 link->dpcd_caps.psr_info.psr_version, in amdgpu_dm_initialize_drm_device()
8753 if (acrtc_state->stream->link->psr_settings.psr_version < in manage_dm_interrupts()
9257 else if (psr->psr_version != DC_PSR_VERSION_UNSUPPORTED && in amdgpu_dm_enable_self_refresh()
9287 if (psr->psr_version == DC_PSR_VERSION_SU_1 && in amdgpu_dm_enable_self_refresh()
9438 acrtc_state->stream->link->psr_settings.psr_version == in amdgpu_dm_commit_planes()
9448 if (acrtc_state->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 && in amdgpu_dm_commit_planes()
/drivers/gpu/drm/amd/display/dc/dce/
A Ddmub_hw_lock_mgr.c70 if (link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) in should_use_dmub_lock()
77 if (link->psr_settings.psr_version == DC_PSR_VERSION_1) { in should_use_dmub_lock()
A Ddmub_psr.c145 if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED) in dmub_psr_set_version()
151 switch (stream->link->psr_settings.psr_version) { in dmub_psr_set_version()
410 if (link->psr_settings.psr_version == DC_PSR_VERSION_1 && in dmub_psr_copy_settings()
A Ddce_dmcu.c347 dmcu->dmcu_version.psr_version = REG_READ(DMCU_IRAM_RD_DATA); in dcn10_get_dmcu_version()
/drivers/gpu/drm/amd/display/modules/info_packet/
A Dinfo_packet.c150 if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) in mod_build_vsc_infopacket()
154 else if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_1) in mod_build_vsc_infopacket()
/drivers/gpu/drm/amd/display/dc/inc/hw/
A Ddmcu.h44 unsigned int psr_version; member
/drivers/gpu/drm/amd/display/dc/link/protocols/
A Dlink_edp_panel_control.c520 if (link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) { in edp_power_alpm_dpcd_enable()
715 if (link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED) in edp_setup_psr()
734 if (link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) { in edp_setup_psr()
762 if (link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) { in edp_setup_psr()
A Dlink_dp_capability.c2146 &link->dpcd_caps.psr_info.psr_version, in detect_edp_sink_caps()
2147 sizeof(link->dpcd_caps.psr_info.psr_version)); in detect_edp_sink_caps()
/drivers/gpu/drm/bridge/analogix/
A Danalogix_dp_core.c99 unsigned char psr_version; in analogix_dp_detect_sink_psr() local
102 ret = drm_dp_dpcd_readb(&dp->aux, DP_PSR_SUPPORT, &psr_version); in analogix_dp_detect_sink_psr()
108 dev_dbg(dp->dev, "Panel PSR version : %x\n", psr_version); in analogix_dp_detect_sink_psr()
109 return psr_version & DP_PSR_IS_SUPPORTED; in analogix_dp_detect_sink_psr()
/drivers/gpu/drm/amd/display/dc/dml/dcn351/
A Ddcn351_fpu.c627 bool is_psr = (link && (link->psr_settings.psr_version == DC_PSR_VERSION_1 || in dcn351_decide_zstate_support()
628 … link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) && !link->panel_config.psr.disable_psr); in dcn351_decide_zstate_support()
/drivers/gpu/drm/amd/display/dc/
A Ddc_types.h605 unsigned char psr_version; member
1027 enum dc_psr_version psr_version; // Internal PSR version, determined based on DPCD member
A Ddc_dp_types.h904 unsigned char psr_version; member
1143 uint8_t psr_version; member
A Ddc_dmub_srv.c1015 if ((pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1 || in dc_dmub_should_update_cursor_data()
1016 pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_1) && in dc_dmub_should_update_cursor_data()
/drivers/gpu/drm/amd/display/dc/dml/dcn35/
A Ddcn35_fpu.c594 bool is_psr = (link && (link->psr_settings.psr_version == DC_PSR_VERSION_1 || in dcn35_decide_zstate_support()
595 … link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) && !link->panel_config.psr.disable_psr); in dcn35_decide_zstate_support()
/drivers/gpu/drm/amd/display/dc/link/
A Dlink_factory.c735 link->psr_settings.psr_version = DC_PSR_VERSION_UNSUPPORTED; in construct_phy()
816 link->psr_settings.psr_version = DC_PSR_VERSION_UNSUPPORTED; in construct_dpia()
/drivers/gpu/drm/amd/display/modules/power/
A Dpower_helpers.c824 if (dpcd_caps->psr_info.psr_version >= DP_PSR2_WITH_Y_COORD_ET_SUPPORTED) in is_psr_su_specific_panel()
836 if (dpcd_caps->psr_info.psr_version < DP_PSR2_WITH_Y_COORD_IS_SUPPORTED) in is_psr_su_specific_panel()
/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
A Ddcn32_hwseq.c204 (dc->current_state->streams[i]->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED)) in dcn32_check_no_memory_request_for_cab()
267 dc->current_state->streams[i]->link->psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED && in dcn32_apply_idle_power_optimizations()
704 pipe->stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED && in dcn32_update_mall_sel()
/drivers/gpu/drm/amd/display/dc/resource/dcn32/
A Ddcn32_resource_helpers.c237 if (pipe->stream && pipe->stream->link->psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED) { in dcn32_is_psr_capable()
/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
A Ddcn35_hwseq.c657 (link->psr_settings.psr_version == DC_PSR_VERSION_1 || in dcn35_apply_idle_power_optimizations()
658 link->psr_settings.psr_version == DC_PSR_VERSION_SU_1); in dcn35_apply_idle_power_optimizations()
/drivers/gpu/drm/amd/display/dmub/inc/
A Ddmub_cmd.h3171 enum psr_version { enum
3508 enum psr_version version;
/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
A Ddcn30_hwseq.c965 stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED && in dcn30_apply_idle_power_optimizations()

Completed in 853 milliseconds

12