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Searched refs:pstate_table (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/amd/pm/swsmu/smu13/
A Daldebaran_ppt.c603 &smu->pstate_table; in aldebaran_populate_umd_state_clk()
623 pstate_table->gfxclk_pstate.standard = in aldebaran_populate_umd_state_clk()
625 pstate_table->uclk_pstate.standard = in aldebaran_populate_umd_state_clk()
631 pstate_table->gfxclk_pstate.min; in aldebaran_populate_umd_state_clk()
632 pstate_table->uclk_pstate.standard = in aldebaran_populate_umd_state_clk()
633 pstate_table->uclk_pstate.min; in aldebaran_populate_umd_state_clk()
635 pstate_table->socclk_pstate.min; in aldebaran_populate_umd_state_clk()
830 struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; in aldebaran_emit_clk_levels() local
1327 struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; in aldebaran_set_performance_level() local
1367 struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; in aldebaran_set_soft_freq_limited_range() local
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A Dsmu_v13_0_6_ppt.c1112 struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; in smu_v13_0_6_populate_umd_state_clk() local
1132 pstate_table->gfxclk_pstate.standard = in smu_v13_0_6_populate_umd_state_clk()
1134 pstate_table->uclk_pstate.standard = in smu_v13_0_6_populate_umd_state_clk()
1140 pstate_table->gfxclk_pstate.min; in smu_v13_0_6_populate_umd_state_clk()
1141 pstate_table->uclk_pstate.standard = in smu_v13_0_6_populate_umd_state_clk()
1142 pstate_table->uclk_pstate.min; in smu_v13_0_6_populate_umd_state_clk()
1144 pstate_table->socclk_pstate.min; in smu_v13_0_6_populate_umd_state_clk()
1359 struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; in smu_v13_0_6_print_clk_levels() local
1967 struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; in smu_v13_0_6_set_performance_level() local
2020 struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; in smu_v13_0_6_set_soft_freq_limited_range() local
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A Dsmu_v13_0.c1599 struct smu_umd_pstate_table *pstate_table = in smu_v13_0_set_performance_level() local
1600 &smu->pstate_table; in smu_v13_0_set_performance_level()
1708 pstate_table->uclk_pstate.curr.min = mclk_min; in smu_v13_0_set_performance_level()
1709 pstate_table->uclk_pstate.curr.max = mclk_max; in smu_v13_0_set_performance_level()
1737 pstate_table->vclk_pstate.curr.min = vclk_min; in smu_v13_0_set_performance_level()
1738 pstate_table->vclk_pstate.curr.max = vclk_max; in smu_v13_0_set_performance_level()
2503 struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; in smu_v13_0_reset_custom_level() local
2505 pstate_table->uclk_pstate.custom.min = 0; in smu_v13_0_reset_custom_level()
2506 pstate_table->uclk_pstate.custom.max = 0; in smu_v13_0_reset_custom_level()
2507 pstate_table->gfxclk_pstate.custom.min = 0; in smu_v13_0_reset_custom_level()
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A Dsmu_v13_0_7_ppt.c2303 struct smu_umd_pstate_table *pstate_table = in smu_v13_0_7_populate_umd_state_clk() local
2304 &smu->pstate_table; in smu_v13_0_7_populate_umd_state_clk()
2310 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v13_0_7_populate_umd_state_clk()
2317 pstate_table->uclk_pstate.min = mem_table->min; in smu_v13_0_7_populate_umd_state_clk()
2318 pstate_table->uclk_pstate.peak = mem_table->max; in smu_v13_0_7_populate_umd_state_clk()
2320 pstate_table->socclk_pstate.min = soc_table->min; in smu_v13_0_7_populate_umd_state_clk()
2323 pstate_table->vclk_pstate.min = vclk_table->min; in smu_v13_0_7_populate_umd_state_clk()
2324 pstate_table->vclk_pstate.peak = vclk_table->max; in smu_v13_0_7_populate_umd_state_clk()
2326 pstate_table->dclk_pstate.min = dclk_table->min; in smu_v13_0_7_populate_umd_state_clk()
2327 pstate_table->dclk_pstate.peak = dclk_table->max; in smu_v13_0_7_populate_umd_state_clk()
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A Dsmu_v13_0_0_ppt.c2317 struct smu_umd_pstate_table *pstate_table = in smu_v13_0_0_populate_umd_state_clk() local
2318 &smu->pstate_table; in smu_v13_0_0_populate_umd_state_clk()
2324 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v13_0_0_populate_umd_state_clk()
2331 pstate_table->uclk_pstate.min = mem_table->min; in smu_v13_0_0_populate_umd_state_clk()
2332 pstate_table->uclk_pstate.peak = mem_table->max; in smu_v13_0_0_populate_umd_state_clk()
2334 pstate_table->socclk_pstate.min = soc_table->min; in smu_v13_0_0_populate_umd_state_clk()
2337 pstate_table->vclk_pstate.min = vclk_table->min; in smu_v13_0_0_populate_umd_state_clk()
2338 pstate_table->vclk_pstate.peak = vclk_table->max; in smu_v13_0_0_populate_umd_state_clk()
2340 pstate_table->dclk_pstate.min = dclk_table->min; in smu_v13_0_0_populate_umd_state_clk()
2341 pstate_table->dclk_pstate.peak = dclk_table->max; in smu_v13_0_0_populate_umd_state_clk()
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/drivers/gpu/drm/amd/pm/swsmu/smu14/
A Dsmu_v14_0.c1262 struct smu_umd_pstate_table *pstate_table = in smu_v14_0_set_performance_level() local
1263 &smu->pstate_table; in smu_v14_0_set_performance_level()
1345 pstate_table->gfxclk_pstate.curr.min = sclk_min; in smu_v14_0_set_performance_level()
1358 pstate_table->uclk_pstate.curr.min = mclk_min; in smu_v14_0_set_performance_level()
1359 pstate_table->uclk_pstate.curr.max = mclk_max; in smu_v14_0_set_performance_level()
1387 pstate_table->vclk_pstate.curr.min = vclk_min; in smu_v14_0_set_performance_level()
1388 pstate_table->vclk_pstate.curr.max = vclk_max; in smu_v14_0_set_performance_level()
1403 pstate_table->dclk_pstate.curr.min = dclk_min; in smu_v14_0_set_performance_level()
1404 pstate_table->dclk_pstate.curr.max = dclk_max; in smu_v14_0_set_performance_level()
1416 pstate_table->fclk_pstate.curr.min = fclk_min; in smu_v14_0_set_performance_level()
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A Dsmu_v14_0_2_ppt.c1597 struct smu_umd_pstate_table *pstate_table = in smu_v14_0_2_populate_umd_state_clk() local
1598 &smu->pstate_table; in smu_v14_0_2_populate_umd_state_clk()
1604 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v14_0_2_populate_umd_state_clk()
1611 pstate_table->uclk_pstate.min = mem_table->min; in smu_v14_0_2_populate_umd_state_clk()
1612 pstate_table->uclk_pstate.peak = mem_table->max; in smu_v14_0_2_populate_umd_state_clk()
1614 pstate_table->socclk_pstate.min = soc_table->min; in smu_v14_0_2_populate_umd_state_clk()
1617 pstate_table->vclk_pstate.min = vclk_table->min; in smu_v14_0_2_populate_umd_state_clk()
1618 pstate_table->vclk_pstate.peak = vclk_table->max; in smu_v14_0_2_populate_umd_state_clk()
1620 pstate_table->dclk_pstate.min = dclk_table->min; in smu_v14_0_2_populate_umd_state_clk()
1621 pstate_table->dclk_pstate.peak = dclk_table->max; in smu_v14_0_2_populate_umd_state_clk()
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/drivers/gpu/drm/amd/pm/swsmu/smu11/
A Darcturus_ppt.c581 struct smu_umd_pstate_table *pstate_table = in arcturus_populate_umd_state_clk() local
582 &smu->pstate_table; in arcturus_populate_umd_state_clk()
596 pstate_table->gfxclk_pstate.standard = in arcturus_populate_umd_state_clk()
598 pstate_table->uclk_pstate.standard = in arcturus_populate_umd_state_clk()
600 pstate_table->socclk_pstate.standard = in arcturus_populate_umd_state_clk()
603 pstate_table->gfxclk_pstate.standard = in arcturus_populate_umd_state_clk()
604 pstate_table->gfxclk_pstate.min; in arcturus_populate_umd_state_clk()
605 pstate_table->uclk_pstate.standard = in arcturus_populate_umd_state_clk()
606 pstate_table->uclk_pstate.min; in arcturus_populate_umd_state_clk()
607 pstate_table->socclk_pstate.standard = in arcturus_populate_umd_state_clk()
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A Dsienna_cichlid_ppt.c1495 struct smu_umd_pstate_table *pstate_table = in sienna_cichlid_populate_umd_state_clk() local
1496 &smu->pstate_table; in sienna_cichlid_populate_umd_state_clk()
1499 pstate_table->gfxclk_pstate.min = gfx_table->min; in sienna_cichlid_populate_umd_state_clk()
1500 pstate_table->gfxclk_pstate.peak = gfx_table->max; in sienna_cichlid_populate_umd_state_clk()
1502 pstate_table->uclk_pstate.min = mem_table->min; in sienna_cichlid_populate_umd_state_clk()
1503 pstate_table->uclk_pstate.peak = mem_table->max; in sienna_cichlid_populate_umd_state_clk()
1505 pstate_table->socclk_pstate.min = soc_table->min; in sienna_cichlid_populate_umd_state_clk()
1506 pstate_table->socclk_pstate.peak = soc_table->max; in sienna_cichlid_populate_umd_state_clk()
1521 pstate_table->gfxclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_GFXCLK; in sienna_cichlid_populate_umd_state_clk()
1522 pstate_table->uclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_MEMCLK; in sienna_cichlid_populate_umd_state_clk()
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A Dsmu_v11_0.c1863 struct smu_umd_pstate_table *pstate_table = in smu_v11_0_set_performance_level() local
1864 &smu->pstate_table; in smu_v11_0_set_performance_level()
1893 sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; in smu_v11_0_set_performance_level()
1894 mclk_min = mclk_max = pstate_table->uclk_pstate.standard; in smu_v11_0_set_performance_level()
1895 socclk_min = socclk_max = pstate_table->socclk_pstate.standard; in smu_v11_0_set_performance_level()
1898 sclk_min = sclk_max = pstate_table->gfxclk_pstate.min; in smu_v11_0_set_performance_level()
1901 mclk_min = mclk_max = pstate_table->uclk_pstate.min; in smu_v11_0_set_performance_level()
1904 sclk_min = sclk_max = pstate_table->gfxclk_pstate.peak; in smu_v11_0_set_performance_level()
1905 mclk_min = mclk_max = pstate_table->uclk_pstate.peak; in smu_v11_0_set_performance_level()
1906 socclk_min = socclk_max = pstate_table->socclk_pstate.peak; in smu_v11_0_set_performance_level()
A Dnavi10_ppt.c1719 struct smu_umd_pstate_table *pstate_table = in navi10_populate_umd_state_clk() local
1720 &smu->pstate_table; in navi10_populate_umd_state_clk()
1782 pstate_table->gfxclk_pstate.standard = in navi10_populate_umd_state_clk()
1784 pstate_table->uclk_pstate.standard = in navi10_populate_umd_state_clk()
1786 pstate_table->socclk_pstate.standard = in navi10_populate_umd_state_clk()
1789 pstate_table->gfxclk_pstate.standard = in navi10_populate_umd_state_clk()
1790 pstate_table->gfxclk_pstate.min; in navi10_populate_umd_state_clk()
1791 pstate_table->uclk_pstate.standard = in navi10_populate_umd_state_clk()
1792 pstate_table->uclk_pstate.min; in navi10_populate_umd_state_clk()
1793 pstate_table->socclk_pstate.standard = in navi10_populate_umd_state_clk()
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/drivers/gpu/drm/amd/pm/swsmu/
A Damdgpu_smu.c3101 struct smu_umd_pstate_table *pstate_table = in smu_read_sensor() local
3102 &smu->pstate_table; in smu_read_sensor()
3121 *((uint32_t *)data) = pstate_table->gfxclk_pstate.standard * 100; in smu_read_sensor()
3125 *((uint32_t *)data) = pstate_table->uclk_pstate.standard * 100; in smu_read_sensor()
3129 *((uint32_t *)data) = pstate_table->gfxclk_pstate.peak * 100; in smu_read_sensor()
3133 *((uint32_t *)data) = pstate_table->uclk_pstate.peak * 100; in smu_read_sensor()
/drivers/gpu/drm/amd/pm/swsmu/inc/
A Damdgpu_smu.h538 struct smu_umd_pstate_table pstate_table; member

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