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Searched refs:pxl_pllparam (Results 1 – 1 of 1) sorted by relevance

/drivers/gpu/drm/bridge/
A Dtc358767.c607 u32 pxl_pllparam; in tc_pxl_pll_calc() local
689 pxl_pllparam = vco_hi << 24; /* For PLL VCO >= 300 MHz = 1 */ in tc_pxl_pll_calc()
690 pxl_pllparam |= ext_div[best_pre] << 20; /* External Pre-divider */ in tc_pxl_pll_calc()
691 pxl_pllparam |= ext_div[best_post] << 16; /* External Post-divider */ in tc_pxl_pll_calc()
692 pxl_pllparam |= IN_SEL_REFCLK; /* Use RefClk as PLL input */ in tc_pxl_pll_calc()
693 pxl_pllparam |= best_div << 8; /* Divider for PLL RefClk */ in tc_pxl_pll_calc()
694 pxl_pllparam |= best_mul; /* Multiplier for PLL */ in tc_pxl_pll_calc()
700 *out_pxl_pllparam = pxl_pllparam; in tc_pxl_pll_calc()
707 u32 pxl_pllparam = 0; in tc_pxl_pll_en() local
710 ret = tc_pxl_pll_calc(tc, refclk, pixelclock, NULL, &pxl_pllparam); in tc_pxl_pll_en()
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