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Searched refs:qcr (Results 1 – 2 of 2) sorted by relevance

/drivers/iommu/riscv/
A Diommu.c111 _q->qcr = RISCV_IOMMU_REG_ ## name ## CSR; \
254 riscv_iommu_writel(iommu, queue->qcr, in riscv_iommu_queue_enable()
259 riscv_iommu_readl_timeout(iommu, queue->qcr, in riscv_iommu_queue_enable()
267 riscv_iommu_writel(iommu, queue->qcr, 0); in riscv_iommu_queue_enable()
293 riscv_iommu_writel(iommu, queue->qcr, 0); in riscv_iommu_queue_disable()
294 riscv_iommu_readl_timeout(iommu, queue->qcr, in riscv_iommu_queue_disable()
462 ctrl = riscv_iommu_readl(queue->iommu, queue->qcr); in riscv_iommu_cmdq_process()
465 riscv_iommu_writel(queue->iommu, queue->qcr, ctrl); in riscv_iommu_cmdq_process()
547 ctrl = riscv_iommu_readl(iommu, queue->qcr); in riscv_iommu_fltq_process()
549 riscv_iommu_writel(iommu, queue->qcr, ctrl); in riscv_iommu_fltq_process()
A Diommu.h32 u16 qcr; /* control and status register offset */ member

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